circuitpython/ports
Ryan A. Pavlik a77e269121
cp_sapling_m0_revb: board.UART not board.uart
This is the only board that didn't match the all-uppercase convention for these UART (and more generally, these bus) entries.
2021-08-16 17:07:17 -05:00
..
atmel-samd cp_sapling_m0_revb: board.UART not board.uart 2021-08-16 17:07:17 -05:00
cxd56 Move OneWire to `onewireio` from `busio` 2021-08-12 10:47:14 -07:00
esp32s2 ran pre-commit locally 2021-08-15 14:02:43 -06:00
litex count in/out endpoints; allow more usb modules on low-endpoint boards 2021-05-13 21:59:02 -04:00
mimxrt10xx Move OneWire to `onewireio` from `busio` 2021-08-12 10:47:14 -07:00
nrf Move OneWire to `onewireio` from `busio` 2021-08-12 10:47:14 -07:00
raspberrypi Merge pull request #5160 from ZodiusInfuser/patch_tiny2040 2021-08-16 14:54:52 -07:00
stm Move OneWire to `onewireio` from `busio` 2021-08-12 10:47:14 -07:00
unix enable qrio in unix coverage build, and add a test 2021-08-05 12:24:07 -05:00