BHB needs better accuracy from the ADC readings. To avoid changing the ADC configuration for all boards or adding complexity to AnalogIn, I implemented a custom user module to allow the BHB to talk to the ADC in the way that it needs to. I'm open to other approaches here, but this seemed like the least invasive and complex option.
The newest version for the Stage library for PewPewM4 no longer contains
embedded graphics, which frees enough space in flash to enabled back
AnalogIO and also add USB_HID. There is still ~192 bytes left free.
If new additions to CircuitPython make it grow further, we can disable
USB_HID again.
We're moving towards a co-processor model and a Wiznet library is
already available.
New native APIs will replace these for chips with networking like the
ESP32S2 but they won't be these.
On my hardware, esptool reports
MAC: 7c:df:a1:02:6c:b8
after this change, the USB descriptor says SerialNumber: 7CDFA1026CB8
and microcontroller.cpu.id has
>>> "".join("%02x" % byte for byte in microcontroller.cpu.uid)
'c7fd1a20c68b'
Note that the nibble-swapping between USB and cpu.uid is typical.
For instance, an stm32 board has USB SerialNumber
24002500F005D42445632302 but hex-converted microcontroller.cpu.id
420052000f504d4254363220.
The motivation for doing this is so that we can allow
common_hal_mcu_disable_interrupts in IRQ context, something that works
on other ports, but not on nRF with SD enabled. This is because
when SD is enabled, calling sd_softdevice_is_enabled in the context
of an interrupt with priority 2 or 3 causes a HardFault. We have chosen
to give the USB interrupt priority 2 on nRF, the highest priority that
is compatible with SD.
Since at least SoftDevice s130 v2.0.1, sd_nvic_critical_region_enter/exit
have been implemented as inline functions and are safe to call even if
softdevice is not enabled. Reference kindly provided by danh:
https://devzone.nordicsemi.com/f/nordic-q-a/29553/sd_nvic_critical_region_enter-exit-missing-in-s130-v2
Switching to these as the default/only way to enable/disable interrupts
simplifies things, and fixes several problems and potential problems:
* Interrupts at priority 2 or 3 could not call common_hal_mcu_disable_interrupts
because the call to sd_softdevice_is_enabled would HardFault
* Hypothetically, the state of sd_softdevice_is_enabled
could change from the disable to the enable call, meaning the calls
would not match (__disable_irq() could be balanced with
sd_nvic_critical_region_exit).
This also fixes a problem I believe would exist if disable() were called
twice when SD is enabled. There is a single "is_nested_critical_region"
flag, and the second call would set it to 1. Both of the enable()
calls that followed would call critical_region_exit(1), and interrupts
would not properly be reenabled. In the new version of the code,
we use our own nesting_count value to track the intended state, so
now nested disable()s only call critical_region_enter() once, only
updating is_nested_critical_region once; and only the second enable()
call will call critical_region_exit, with the right value of i_n_c_r.
Finally, in port_sleep_until_interrupt, if !sd_enabled, we really do
need to __disable_irq, rather than using the common_hal_mcu routines;
the reason why is documented in a comment.
Not all boards have external flash or other components that make them
require 2.7V -- sometimes we can get considerably longer battery life
by decreasing this requirement.
In particular, pewpew10 and pewpew_m4 are powered directly from
battery, with no LDO, and should work fine down to 1.6V.
I discussed with Hierophect on Discord about how to "de-nest" the code
for configuring SPI objects on STM, because the problems with one
nesting level per pin becomes unmanageable with the up to 10 pins of
SDIO.
This code (which is only compile-tested so far) demonstrates the concept
we discussed.
The SCK pin is always required. Loop over all possibilities of the SCK
pin. When we are considering a particular item in the mcu_spi_sck_list
we have now become committed to using a particular periph_index. If all
the other pins can be satisfied by that periph_index, then we have a
working combination. Once we have a working combination that is not
reserved, we can return that combination. On reaching the end, we have
checked all the possible possibilities and can give the same errors as
before: One if there was a possibility that worked but was reserved;
and another if no possibility worked.
new file: ports/nrf/boards/raytac_mdbt50q-db-40/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip
new file: ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.h
new file: ports/nrf/boards/raytac_mdbt50q-db-40/mpconfigboard.mk
new file: ports/nrf/boards/raytac_mdbt50q-db-40/pins.c
Testing performed: That a card is successfully mounted on Pygamer with
the built in SD card slot
This module is enabled for most FULL_BUILD boards, but is disabled for
samd21 ("M0"), litex, and pca10100 for various reasons.
Since Actions passed on the previous commit, where this computed value
was checked against the specified value (if any), this is no net change,
except that we no longer need to specify it for particular boards or
ports.
Few peripherals are actually tested. However, USB, I2C and GPIO seem to work.
Most pins are silkscreened with the "PX00" style, so the board module
only includes the small number that are screened differently.
The default SPI, I2C, and UART are the ones on the EXT2 header. This is
arbitrary, but the I2C on this connector is shared with the on-board I2C
devices and the PCC header, making it the most versatile.
This introduces the new macro SAM_D5X_E5X. This is mostly the same
as SAMD51 before, except in a few places where a special case for
SAME54 is required
I noticed that this code was referring to samd-specific functionality,
and isn't enabled except in one samd board (pewpew10). Move it.
There is incomplte support for _pew in mimxrt10xx which then caused build
errors; adding a #if guard to check for _pew being enabled fixes it.
The _pew module is not likely to be important on mimxrt but I'll leave the
choice to remove it to someone else.
When compiling with optimizations on, an issue occurs where the claimed_pins/never_reset_pins memory location is shared with another variable. This causes some bad memory read, so the USB pins ended up being reset. Setting these to have an alignment of 4 bytes resolves this.
Tested on nucleo_f746zg
