complete pin mapping for Feather pins
stubbed out files needed for complilation. still to be modified
0 out all CPY modules in mpconfigboard.mk until we get the build running
add csv for pin generation for STM32L4R5
add F4R5 references in peripherals files
refactored out board files BECAUSE I AM AN IDIOT; add L4 series system clocks file from CubeMX
took a guess at the number of USB endpoint pairs to get the build done
guess was close, but wrong. It is 8
clean up peripheral DEFs
Fixes build error:
```
In file included from ../../py/mpstate.h:33,
from ../../py/mpstate.c:27:
../../py/misc.h: In function 'vstr_str':
../../py/misc.h:196:1: sorry, unimplemented: Thumb-1 hard-float VFP ABI
static inline char *vstr_str(vstr_t *vstr) {
^~~~~~
```
Sleuthing steps:
* verify that the feather_stm32f4_express board builds correctly
* put a `#error` at the bottom of the `mpstate.c` file.
* build for the feather and swan boards, with V=2 to capture the build command for that file.
* use a differencing tool to inspect the differences between the two invocations
* inspecting the differences, I saw a missing `-mcpu=cortex-m4` I tested by adding that to the Swan build command. The file built fine (stopping at the hard error, but no other warnings.)
A grep through the sources revealed where this flag was being set for the stm ports.
With this commit, the build gets further, but does not complete. The next exciting episode in this unfolding coding saga is just a commit away!
working build with minimal set of modules for the Blues Swan r5
chore:change header copyright name to Blues Wireless Contributors
USB operational. Fixed up clocks to be hardwired for LSE no HSE case. (Trying to combine HSE in there made the code much more complex, and I don't have a board to test it out on.)
USART working
adds support for `ENABLE_3V3` and `DISCHARGE_3V3` pins. I am surprised that pin definitions are quite low-level and don't include default direction and state, so the code currently has to initialize `ENABLE_3V3` pin as output. The LED takes over a second to discharge, so I wonder if the board startup code is not having the desired affect.
short circuit implementation of backup memory for the STM32L4
all the ports
remove company name from board name to be consistent with the Arduino board definition.
add default pins for I2C, SPI and UART, so that `board.I2C` et al. works as expected. Confirmed I2C timing.
fix board name
fix incorrect pin definition. add test to allow manual check of each output pin
analog IO
code changes for WebUSB. Doesn't appear to work, will revisit later.
ensure that `sys.platform` is available
checkin missing file
feat: make room for a larger filesystem so the sensor tutorial will fit on the device.
fix:(stm32l4r5zi.csv): merged AF0-7 and AF8-15 into single lines and removed extraneous headers mixed in with the data.
fix(parse_af_csv.py): pin index in the csv is 0 not 1, and AF index made 1 larger
chore(Swan R5): update peripherals pins from `parse_af_csv.py` output
optimize flash sector access
This changes lots of files to unify `board.h` across ports. It adds
`board_deinit` when CIRCUITPY_ALARM is set. `main.c` uses it to
deinit the board before deep sleeping (even when pretending.)
Deep sleep is now a two step process for the port. First, the
port should prepare to deep sleep based on the given alarms. It
should set alarms for both deep and pretend sleep. In particular,
the pretend versions should be set immediately so that we don't
miss an alarm as we shutdown. These alarms should also wake from
`port_idle_until_interrupt` which is used when pretending to deep
sleep.
Second, when real deep sleeping, `alarm_enter_deep_sleep` is called.
The port should set any alarms it didn't during prepare based on
data it saved internally during prepare.
ESP32-S2 sleep is a bit reorganized to locate more logic with
TimeAlarm. This will help it scale to more alarm types.
Fixes#3786
Currently, only the bus specs of the stm32f405xx have been coded.
Other stm-family chips need (at a minimum) the specs added in their
periph.[ch] files.
I discussed with Hierophect on Discord about how to "de-nest" the code
for configuring SPI objects on STM, because the problems with one
nesting level per pin becomes unmanageable with the up to 10 pins of
SDIO.
This code (which is only compile-tested so far) demonstrates the concept
we discussed.
The SCK pin is always required. Loop over all possibilities of the SCK
pin. When we are considering a particular item in the mcu_spi_sck_list
we have now become committed to using a particular periph_index. If all
the other pins can be satisfied by that periph_index, then we have a
working combination. Once we have a working combination that is not
reserved, we can return that combination. On reaching the end, we have
checked all the possible possibilities and can give the same errors as
before: One if there was a possibility that worked but was reserved;
and another if no possibility worked.
Restructures the STM port of Circuitpython to be more generic about the STM32 chip lines to support
the F7 and H7 series of chips. Adds the new Packages directory to organize different chip layouts
between lines. Makes general changes to the Makefile to condense board-level flags to the minimum
and support the new chip series. Adds the new chip line to the Peripherals directory, along with
new python tools used to generate peripheral text automatically in the tools/ directory.
