Commit Graph

5 Commits

Author SHA1 Message Date
Damien George f042d7a4d7 stmhal: Fix edge case for timer PWM of 100%.
Also improve precision of calculating PWM percent in integer mode.
Also update teensy with edge case fix.
2014-09-29 14:15:01 +01:00
Dave Hylands 39296b40d4 Fix timer overflow code.
Teensy doesn't need to worry about overflows since all of
its timers are only 16-bit.

For PWM, the pulse width needs to be able to vary from 0..period+1
(pulse-width == period+1 corresponds to 100% PWM)

I couldn't test the 0xffffffff cases since we can't currently get a
period that big in python. With a prescaler of 0, that corresponds
to a freq of 0.039 (i.e. cycle every 25.56 seconds), and we can't
set that using freq or period.

I also tested both stmhal and teensy with floats disabled, which
required a few other code changes to compile.
2014-09-27 19:40:37 -07:00
Damien George e8ea0724da stmhal, timer: Factor code to compute PWM percent; improve 32bit case.
Also do the same for teensy timer code.
2014-09-25 15:44:10 +01:00
Dave Hylands 53d5fa641f Add pulse_width_percent to teensy.
Fix stmhal and teensy print routines to report actual prescaler an period.
Fix teensy build to use soft-float
Add USE_ARDUINO_TOOLCHAIN option to teensy build
2014-09-23 23:19:36 -07:00
Dave Hylands becbc87fd7 Add Timer support (PWM, OC, IC) for stmhal and teensy 2014-09-19 09:26:13 -07:00