The pin alternate function information is derived from ST's datasheet
https://www.st.com/resource/en/datasheet/stm32l432kc.pdf
In the datasheet, the line 2 of AF4 includes I2C2 but actually the chip
does not have I2C2 so it is removed.
As per the machine.UART documentation, this is used to set the length of
the RX buffer. The legacy read_buf_len argument is retained for backwards
compatibility, with rxbuf overriding it if provided.
Also change the order of printing of flow so it is after stop (so bits,
parity, stop are one after the other), and reduce code size by using
mp_print_str instead of mp_printf where possible.
See issue #1981.
This is necessary for two reasons: 1) FreeRTOS still needs the TCB data
structure even after vPortCleanUpTCB has been called, so this latter hook
function cannot free the TCB, and there is no where else to safely delete
it (this behaviour has changed recently in the ESP IDF); 2) when using
external SPI RAM the uPy heap is in this external memory but the task stack
must be allocated from internal SRAM.
Fixes issue #3904.
We standardized to provide uos.remove() as a more obvious and user-friendly
name. That's what written in the docs. The Unix port implementation
predates this convention, so update it now.
Building axtls gives a lot of warnings with -Wall enabled, and explicitly
disabling all of them cannot be done in a way compatible with gcc and
clang, and likely other compilers. So just use -Wno-all to prevent all of
the extra warnings (in addition to the necessary -Wno-unused-parameter,
-Wno-uninitialized, -Wno-sign-compare and -Wno-old-style-definition).
Fixes issue #4182.
Configurable via MICROPY_MODULE_GETATTR, disabled by default. Among other
things __getattr__ for modules can help to build lazy loading / code
unloading at runtime.
Configurable via MICROPY_PY_BUILTINS_STR_COUNT. Default is enabled.
Disabled for bare-arm, minimal, unix-minimal and zephyr ports. Disabling
it saves 408 bytes on x86.
1. Return correct error code for non-blocking vs timed out socket
(POSIX returns EAGAIN for both, we want ETIMEDOUT in case of timed
out socket). To achieve this, blocking/non-blocking flag is added
to the mp_obj_socket_t, to avoid issuing fcntl() syscall each time
EAGAIN occurs. (mp_obj_socket_t used to be 8 bytes, having some room
in a standard 16-byte alloc block.)
2. Handle socket.settimeout(0) properly - in Python, that means
non-blocking mode, but SO_RCVTIMEO/SO_SNDTIMEO of 0 is infinite
timeout.
3. Overall, make sure that socket.settimeout() call switches blocking
state as expected.
Prior to this commit the USB CDC used the USB start-of-frame (SOF) IRQ to
regularly check if buffered data needed to be sent out to the USB host.
This wasted resources (CPU, power) if no data needed to be sent.
This commit changes how the USB CDC transmits buffered data:
- When new data is first available to send the data is queued immediately
on the USB IN endpoint, ready to be sent as soon as possible.
- Subsequent additions to the buffer (via usbd_cdc_try_tx()) will wait.
- When the low-level USB driver has finished sending out the data queued
in the USB IN endpoint it calls usbd_cdc_tx_ready() which immediately
queues any outstanding data, waiting for the next IN frame.
The benefits on this new approach are:
- SOF IRQ does not need to run continuously so device has a better chance
to sleep for longer, and be more responsive to other IRQs.
- Because SOF IRQ is off, current consumption is reduced by a small amount,
roughly 200uA when USB is connected (measured on PYBv1.0).
- CDC tx throughput (USB IN) on PYBv1.0 is about 2.3 faster (USB OUT is
unchanged).
- When USB is connected, Python code that is executing is slightly faster
because SOF IRQ no longer interrupts continuously.
- On F733 with USB HS, CDC tx throughput is about the same as prior to this
commit.
- On F733 with USB HS, Python code is about 5% faster because of no SOF.
As part of this refactor, the serial port should no longer echo initial
characters when the serial port is first opened (this only used to happen
rarely on USB FS, but on USB HS is was more evident).
For s132 and s140, GAP_ADV_MAX_SIZE was currently set to
BLE_GATT_ATT_MTU_DEFAULT, which is 23. The correct value
should have been 31, but there are no define for this in
the s132/s140 header files as for s110.
Updating define in ble_drv.c to the correct value of 31.
The macros are MICROPY_HEAP_START and MICROPY_HEAP_END, and if not defined
by a board then the default values will be used (maximum heap from SRAM as
defined by linker symbols).
As part of this commit the SDRAM initialisation is moved to much earlier in
main() to potentially make it available to other peripherals and avoid
re-initialisation on soft-reboot. On boards with SDRAM enabled the heap
has been set to use that.
Add some more POSIX compatibility by adding a d_type field to the
dirent structure and defining corresponding macros so listdir_next
in the unix' port modos.c can use it, end result being uos.ilistdir
now reports the file type.
This will allow to e.g. implement HTTP Digest authentication.
Adds 540 bytes for x86_32, 332 for arm_thumb2 (for Unix port, which already
includes axTLS library).
This commit adds the math.factorial function in two variants:
- squared difference, which is faster than the naive version, relatively
compact, and non-recursive;
- a mildly optimised recursive version, faster than the above one.
There are some more optimisations that could be done, but they tend to take
more code, and more storage space. The recursive version seems like a
sensible compromise.
The new function is disabled by default, and uses the non-optimised version
by default if it is enabled. The options are MICROPY_PY_MATH_FACTORIAL
and MICROPY_OPT_MATH_FACTORIAL.
Configuring clocks is a critical operation and is best to avoid when
possible. If the clocks really need to be reset to the same values then
one can pass in a slightly higher value, eg 168000001 Hz to get 168MHz.
This ensures that on first boot the most optimal settings are used for the
voltage scaling and flash latency (for F7 MCUs).
This commit also provides more fine-grained control for the flash latency
settings.
Power and clock control is low-level functionality and it makes sense to
have it in a dedicated file, at least so it can be reused by other parts of
the code.
On F7s PLLSAI is used as a 48MHz clock source if the main PLL cannot
provide such a frequency, and on L4s PLLSAI1 is always used as a clock
source for the peripherals. This commit makes sure these PLLs are
re-enabled upon waking from stop mode so the peripherals work.
See issues #4022 and #4178 (L4 specific).
Changes made:
- make use of MP_OBJ_TO_PTR and MP_OBJ_FROM_PTR where necessary
- fix shadowing of index variable i, renamed to j
- fix type of above variable to size_t to prevent comparison warning
- fix shadowing of res variable
- use "(void)" instead of "()" for functions that take no arguments
This part is functionally similar to STM32F767xx (they share a datasheet)
so support is generally comparable. When adding board support the
stm32f767_af.csv and stm32f767.ld should be used.
If DTTOIF() macro is not defined, the code refers to MP_S_IFDIR, etc.
symbols defined in extmod/vfs.h, so should include it.
This fixes build for Android.
The HAL DMA functions enable SDMMC interrupts before fully resetting the
peripheral, and this can lead to a DTIMEOUT IRQ during the initialisation
of the DMA transfer, which then clears out the DMA state and leads to the
read/write not working at all. The DTIMEOUT is there from previous SDMMC
DMA transfers, even those that succeeded, and is of duration ~180 seconds,
which is 0xffffffff / 24MHz (default DTIMER value, and clock of
peripheral).
To work around this issue, fully reset the SDMMC peripheral before calling
the HAL SD DMA functions.
Fixes issue #4110.
The flash-IRQ handler is used to flush the storage cache, ie write
outstanding block data from RAM to flash. This is triggered by a timeout,
or by a direct call to flush all storage caches.
Prior to this commit, a timeout could trigger the cache flushing to occur
during the execution of a read/write to external SPI flash storage. In
such a case the storage subsystem would break down.
SPI storage transfers are already protected against USB IRQs, so by
changing the priority of the flash IRQ to that of the USB IRQ (what is
done in this commit) the SPI transfers can be protected against any
timeouts triggering a cache flush (the cache flush would be postponed until
after the transfer finished, but note that in the case of SPI writes the
timeout is rescheduled after the transfer finishes).
The handling of internal flash sync'ing needs to be changed to directly
call flash_bdev_irq_handler() sync may be called with the IRQ priority
already raised (eg when called from a USB MSC IRQ handler).
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals. In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq(). PLLSAI will only be enabled
if needed, and consumes about 1mA extra. This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket. This patch suppresses
such warnings for this file only.
The aim here is to have spi.c contain the low-level SPI driver which is
independent (not fully but close) of MicroPython objects and methods, and
the higher-level bindings are separated out to pyb_spi.c and machine_spi.c.
Among other things, this requires putting bootloader object files in to
their relevant .a archive, so that they can be correctly referenced by the
ESP IDF's linker script.
- Allow configuration by a board of autorefresh number and burst length.
- Increase MPU region size to 8MiB.
- Make SDRAM region cacheable and executable.
"coverage" build uses different BUILD directory comparing to the normal
build. Previously, any build picked up libaxtls.a from normal build's
directory, but that was fixed recently. So, for each build, we must
build axtls explicitly.
This fixes Travis build in particular.
Use overrideable properties instead of hardcoding the use of the
default cl executable used by msvc toolsets. This allows using
arbitrary compiler commands for qstr header generation.
The CLToolExe and CLToolPath properties are used because they are,
even though absent from any official documentation, the de-facto
standard as used by the msvc toolsets themselves.
Requesting a baudrate of X should never configure the peripheral to have a
baudrate greater than X because connected hardware may not be able to
handle higher speeds. This patch makes sure to round the prescaler up so
that the actual baudrate is rounded down.
Prior to this patch, if VBAT was read via ADC.read() or
ADCAll.read_channel(), then it would remain enabled and subsequent reads
of TEMPSENSOR or VREFINT would not work. This patch makes sure that VBAT
is disabled for all cases that it could be read.
This patch in effect renames MICROPY_DEBUG_PRINTER_DEST to
MICROPY_DEBUG_PRINTER, moving its default definition from
lib/utils/printf.c to py/mpconfig.h to make it official and documented, and
makes this macro a pointer rather than the actual mp_print_t struct. This
is done to get consistency with MICROPY_ERROR_PRINTER, and provide this
macro for use outside just lib/utils/printf.c.
Ports are updated to use the new macro name.
The NRF52 define only covers nrf52832, so update the define checks
to use NRF52_SERIES to cover both nrf52832 and nrf52840.
Fixed machine_hard_pwm_instances table in modules/machine/pwm.c
This enables PWM(0) to PWM(3), RTCounter(2), Timer(3) and Timer(4),
in addition to NFC reset cause, on nrf52840.
When waking from stop mode most of the system is still in the same state as
before entering stop, so only minimal configuration is needed to bring the
system clock back online.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket. This patch suppresses
such warnings for this file only.
Works with pins declared normally in mpconfigboard.h, eg. (pin_XX), as well
as (pyb_pin_XX).
Provides new mp_hal_pin_config_alt_static(pin_obj, mode, pull, fn_type)
function declared in pin_static_af.h to allow configuring pin alternate
functions by name at compile time.
This mechanism will scale to to an arbitrary number of pollable objects, so
long as they implement the MP_STREAM_GET_FILENO ioctl. Since ussl objects
pass through ioctl requests transparently to the underlying socket object,
it will allow ussl sockets to be polled. And a user object with uio.IOBase
as a base could support polling.
The code was dereferencing 0x800 and loading a value from there, trying to
use a literal value (not address) defined in the linker script
(_ram_fs_cache_block_size) which was 0x800.
Adding MICROPY_FATFS as makefile flag in order to explicitly
include oofatfs files to be compiled into the build.
The flag is set to 0 by default. Must be set in addition to
MICROPY_VFS and MICROPY_VFS_FAT in mpconfigport.h.
Temporarly solving the issue of
"differ from the size of original declaration [-Werror=lto-type-mismatch]
until linker is fixed in upcomming release of gcc.
Bug is reported by others, and will be fixed in next version of arm-gcc.
However, this patch makes it possible to use modmusic and modimage
with current compilers.
Alternativly, the code can be compiled with LTO=0, but uses valuable 9K
more on this already squeezed target (microbit).
Support added for s132/s140 v6 in linker scripts and boards.
Support removed for s132 v2/3/5.
Download script updated to fetch new stacks and removed the
non-supported ones.
ble_drv.c updated to only handle s110 v8, and s132/s140 v6.
ubluepy updated to continue scanning after each individual scan
report reported to the module to keep old behaviour of the
Scanner class.
This patch generalize the feather52 target to be a board without
an in-built Bluetooth stack or bootloader giving all flash memory to
micropython code.
This way the feather52 target can run any supported Bluetooth LE
stack the port supports for other nrf52832 targets. Hence, this
make Makefiles/linker scripts and BLE driver support easier
to maintain in the future.
Current adoption on top of nrfx only reads the GPIO->IN register.
In order to read back an output state, nrf_gpio_pin_out_read has
to be called.
This patch concatinate the two read functions such that, if
either IN or OUT register has a value 1 it will return this,
else 0.
Updating lib/nrfx submodule to latest version of master to get
the new GPIO API to read pin direction.
(nrfx: d37b16f2b894b0928395f6f56ca741287a31a244)
Cleaning up use of "pyb" module.
Moving the file to a new folder and updating the
makefile accordingly. New module created called
"board" to take over the functionality of the legacy
"pyb" module.
Updating outdated documentation referring to pyb.Pin,
to now point to machine.Pin.
As EasyDMA variant of SPI(M) might clock out an additional byte
in single byte transactions this patch moves the nrf52832 to
use SPI and not SPIM to get more stable data transactions.
Ref: nrf52832 rev2 errata v1.1, suggested workaround is:
"Use the SPI module (deprecated but still available) or
use the following workaround with SPIM ..."
Current nrfx SPIM driver does not contain this workaround,
and in the meanwhile moving back to SPI fixes the issue.
Also, tabbing the nrfx_config.h a bit to make it more readable.
