This is a "normal" SPI peripheral with no external pins, to avoid having to
grow spi_obj[] for just this one board map it as SPI ID 3 (board has SPI
IDs 1,2 already).
Signed-off-by: Angus Gratton <angus@redyak.com.au>
This commit adds initial support for STM32H5xx MCUs. The following
features have been confirmed to be working on an STM32H573:
- UART over REPL and USB CDC
- USB CDC and MSC
- internal flash filesystem
- machine.Pin
- machine.SPI transfers with DMA
- machine.ADC
- machine.RTC
- pyb.LED
- pyb.Switch
- pyb.rng
- mboot
Signed-off-by: Damien George <damien@micropython.org>
This commit adds support for the STM32G4 series of MCUs, and a board
definition for NUCLEO_G474RE. This board has the REPL on LPUART1 which is
connected to the on-board ST-link USB-UART.
Any external user of DMA (eg a board with a custom DMA driver) must call
dma_external_acquire() for their DMA controller/stream to ensure that the
DMA clock is not automatically turned off while it's still being used
externally.
Signed-off-by: Damien George <damien@micropython.org>
This commit adds I2S protocol support for the esp32 and stm32 ports, via
a new machine.I2S class. It builds on the stm32 work of blmorris, #1361.
Features include:
- a consistent I2S API across the esp32 and stm32 ports
- I2S configurations supported:
- master transmit and master receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequency
- 3 modes of operation:
- blocking
- non-blocking with callback
- uasyncio
- internal ring buffer size can be tuned
- documentation for Pyboards and esp32-based boards
- tested on the following development boards:
- Pyboard D SF2W
- Pyboard V1.1
- ESP32 with SPIRAM
- ESP32
Signed-off-by: Mike Teachman <mike.teachman@gmail.com>
This new series of MCUs is similar to the L4 series with an additional
Cortex-M0 coprocessor. The firmware for the wireless stack must be managed
separately and MicroPython does not currently interface to it. Supported
features so far include: RTC, UART, USB, internal flash filesystem.
This patch makes the DAC driver simpler and removes the need for the ST
HAL. As part of it, new helper functions are added to the DMA driver,
which also use direct register access instead of the ST HAL.
Main changes to the DAC interface are:
- The DAC uPy object is no longer allocated dynamically on the heap,
rather it's statically allocated and the same object is retrieved for
subsequent uses of pyb.DAC(<id>). This allows to access the DAC objects
without resetting the DAC peripheral. It also means that the DAC is only
reset if explicitly passed initialisation parameters, like "bits" or
"buffering".
- The DAC.noise() and DAC.triangle() methods now output a signal which is
full scale (previously it was a fraction of the full output voltage).
- The DAC.write_timed() method is fixed so that it continues in the
background when another peripheral (eg SPI) uses the DMA (previously the
DAC would stop if another peripheral finished with the DMA and shut the
DMA peripheral off completely).
Based on the above, the following backwards incompatibilities are
introduced:
- pyb.DAC(id) will now only reset the DAC the first time it is called,
whereas previously each call to create a DAC object would reset the DAC.
To get the old behaviour pass the bits parameter like: pyb.DAC(id, bits).
- DAC.noise() and DAC.triangle() are now full scale. To get previous
behaviour (to change the amplitude and offset) write to the DAC_CR (MAMP
bits) and DAC_DHR12Rx registers manually.
Instead of checking each callback (currently storage and dma) explicitly
for each SysTick IRQ, use a simple circular function table indexed by the
lower bits of the millisecond tick counter. This allows callbacks to be
easily enabled/disabled at runtime, and scales well to a large number of
callbacks.
The CMSIS files for the STM32 range provide macros to distinguish between
the different MCU series: STM32F4, STM32F7, STM32H7, STM32L4, etc. Prefer
to use these instead of custom ones.
This is to keep the top-level directory clean, to make it clear what is
core and what is a port, and to allow the repository to grow with new ports
in a sustainable way.
