MICROPY_PY_STM_CONST defaults to 1 if MICROPY_PY_STM is set. Overriding to
0 disables the named register peripheral constants being including in the
stm32 module.
This saves about 7.5KB of code size for the STM32WL55, which is significant
as this SoC doesn't have a lot of flash.
Signed-off-by: Angus Gratton <angus@redyak.com.au>
Switches default on the NUCLEO_WL55 board to use the HSE oscillator powered
from PB0_VDDTCXO pin.
Build-time configuration can select from MSI internal oscillator (previous
default), HSE via crystal, or HSE bypass with TCXO powered from PB0_VDDTCXO
pin (new default)
Signed-off-by: Angus Gratton <angus@redyak.com.au>
This commit adds initial support for STM32H5xx MCUs. The following
features have been confirmed to be working on an STM32H573:
- UART over REPL and USB CDC
- USB CDC and MSC
- internal flash filesystem
- machine.Pin
- machine.SPI transfers with DMA
- machine.ADC
- machine.RTC
- pyb.LED
- pyb.Switch
- pyb.rng
- mboot
Signed-off-by: Damien George <damien@micropython.org>
The G0 USB peripheral behaves more like MICROPY_HW_USB_IS_MULTI_OTG=0 than
that config =1. This fixes the configuration of the PMA FIFO buffers.
Signed-off-by: Damien George <damien@micropython.org>
Also fix MAX_ENDPOINT definition for G0, which follows G4.
This work was funded through GitHub Sponsors.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
This commit adds support for the STM32G4 series of MCUs, and a board
definition for NUCLEO_G474RE. This board has the REPL on LPUART1 which is
connected to the on-board ST-link USB-UART.
A board can now define the following linker symbols to configure its flash
storage layout:
_micropy_hw_internal_flash_storage_start
_micropy_hw_internal_flash_storage_end
_micropy_hw_internal_flash_storage_ram_cache_start
_micropy_hw_internal_flash_storage_ram_cache_end
And optionally have a second flash segment by configuring
MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE_SEGMENT2 to 1 and defining:
_micropy_hw_internal_flash_storage2_start
_micropy_hw_internal_flash_storage2_end
Signed-off-by: Damien George <damien@micropython.org>
This commit is based upon prior work of @dpgeorge and @koendv.
MCU support for the STM32H7A3 and B3 families MCUs:
- STM32H7A3xx
- STM32H7A3xxQ (SMPS)
- STM32H7B3xx
- STM32H7B3xxQ (SMPS)
Support has been added for the STM32H7B3I_DK board.
Signed-off-by: Jan Staal <info@janstaal.com>
For consistency with other board-level config macros that begin with
MICROPY_HW_USB.
Also allow boards in the mimxrt, nrf and samd ports to configure these
values.
Signed-off-by: Damien George <damien@micropython.org>
When disabled the bootloader is entered via a direct jump. When enabled
the bootloader is entered via a system reset then a jump. It's enabled by
default to retain the existing behaviour, which is the recommended way.
Signed-off-by: Damien George <damien@micropython.org>
This can now be selected by setting MICROPY_HW_SDIO_SDMMC, which defaults
to 1, ie SDMMC1. The pins can also be selected and default to the standard
C8/C9/C10/C11/C12/D2.
This can now be selected by setting MICROPY_HW_SDCARD_SDMMC, which defaults
to 1, ie SDMMC1. This commit also renames the SD pin configuration macros
from MICROPY_HW_SDMMC2_xxx to MICROPY_HW_SDCARD_xxx, as well as renaming
MICROPY_HW_SDMMC_BUS_WIDTH to MICROPY_HW_SDCARD_BUS_WIDTH.
Signed-off-by: Damien George <damien@micropython.org>
Two of the defaults have also changed in this commit:
- MICROPY_HW_RFCORE_BLE_LSE_SOURCE changed from 1 to 0, which configures
the LsSource to be LSE (needed due to errata 2.2.1).
- MICROPY_HW_RFCORE_BLE_VITERBI_MODE changed from 0 to 1, which enables
Viterbi mode, following all the ST examples.
Signed-off-by: Damien George <damien@micropython.org>
Add LPUART1 as a standard UART. No low power features are supported, yet.
LPUART1 is enabled as the next available UART after the standard U(S)ARTs:
STM32WB: LPUART1 = UART(2)
STM32L0: LPUART1 = UART(6)
STM32L4: LPUART1 = UART(6)
STM32H7: LPUART1 = UART(9)
On all ports: LPUART1 = machine.UART('LP1')
LPUART1 is enabled by defining MICROPY_HW_LPUART1_TX and
MICROPY_HW_LPUART1_RX in mpconfigboard.h.
Signed-off-by: Chris Mason <c.mason@inchipdesign.com.au>
The default for these is to enable them, but they can now be disabled
individually by a board configuration.
Signed-off-by: Damien George <damien@micropython.org>
It's enabled by default to retain the existing behaviour. A board can
disable this option if it manages mounting the filesystem itself, for
example in frozen code.
Signed-off-by: Damien George <damien@micropython.org>
This only needs to be enabled if a board uses FAT FS on external SPI flash.
When disabled (and using external SPI flash) 4k of RAM can be saved.
Signed-off-by: Damien George <damien@micropython.org>
Allows reserving CAN, I2C, SPI, Timer and UART peripherals. If reserved
the peripheral cannot be accessed from Python.
Signed-off-by: Damien George <damien@micropython.org>
This is needed to moderate concurrent access to the internal flash, as
while an erase/write is in progress execution will stall on the wireless
core due to the bus being locked.
This implements Figure 10 from AN5289 Rev 3.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
The new fdcan.c file provides the low-level C interface to the FDCAN
peripheral, and pyb_can.c is updated to support both traditional CAN and
FDCAN, depending on the MCU being compiled for.
Some SD/MMC breakout boards don't support 4-bit bus mode. This adds a new
macro MICROPY_HW_SDMMC_BUS_WIDTH that allows each board to define the width
of the SD/MMC bus interface used on that board, defaulting to 4 bits.
This new series of MCUs is similar to the L4 series with an additional
Cortex-M0 coprocessor. The firmware for the wireless stack must be managed
separately and MicroPython does not currently interface to it. Supported
features so far include: RTC, UART, USB, internal flash filesystem.
The new configurations MICROPY_HW_USB_MSC and MICROPY_HW_USB_HID can be
used by a board to enabled or disable MSC and/or HID. They are both
enabled by default.
The board config option MICROPY_HW_USB_ENABLE_CDC2 is now changed to
MICROPY_HW_USB_CDC_NUM, and the latter should be defined to the maximum
number of CDC interfaces to support (defaults to 1).
Previously the hardware I2C timeout was hard coded to 50ms which isn't
guaranteed to be enough depending on the clock stretching specs of the I2C
device(s) in use.
This patch ensures the hardware I2C implementation honors the existing
timeout argument passed to the machine.I2C constructor. The default
timeout for software and hardware I2C is now 50ms.
Includes:
- Support for CAN3.
- Support for UART9 and UART10.
- stm32f413xg.ld and stm32f413xh.ld linker scripts.
- stm32f413_af.csv alternate function mapping.
- startup_stm32f413xx.s because F413 has different interrupt vector table.
- Memory configuration with: 240K filesystem, 240K heap, 16K stack.
If MICROPY_HW_RTC_USE_BYPASS is enabled the RTC startup goes as follows:
- RTC is started with LSE in bypass mode to begin with
- if that fails to start (after a given timeout) then LSE is reconfigured
in non-bypass
- if that fails to start then RTC is switched to LSI
To use HSI instead of HSE define MICROPY_HW_CLK_USE_HSI as 1 in the board
configuration file. The default is to use HSE.
HSI has been made the default for the NUCLEO_F401RE board to serve as an
example, and because early revisions of this board need a hardware
modification to get HSE working.
The new option MICROPY_HW_SDCARD_MOUNT_AT_BOOT can now be defined to 0 in
mpconfigboard.h to allow SD hardware to be enabled but not auto-mounted at
boot. This feature is enabled by default to retain previous behaviour.
Previously, if an SD card is enabled in hardware it is also used to boot
from. While this can be disabled with a SKIPSD file on internal flash,
this wont be available at first boot or if the internal flash gets
corrupted.
The macros are MICROPY_HEAP_START and MICROPY_HEAP_END, and if not defined
by a board then the default values will be used (maximum heap from SRAM as
defined by linker symbols).
As part of this commit the SDRAM initialisation is moved to much earlier in
main() to potentially make it available to other peripherals and avoid
re-initialisation on soft-reboot. On boards with SDRAM enabled the heap
has been set to use that.
If no block devices are defined by a board then storage support will be
disabled. This means there is no filesystem provided by either the
internal flash or external SPI flash. But the VFS system can still be
enabled and filesystems provided on external devices like an SD card.
