Commit Graph

356 Commits

Author SHA1 Message Date
Damien George 56f275c0a2 stm32/Makefile: Include copysign.c in double precision float builds.
This is required for DEBUG=1 builds when MICROPY_FLOAT_IMPL=double.

Thanks to Andrew Leech.
2018-09-20 16:51:20 +10:00
Andrew Leech 17f7c683d2 stm32: Add support for STM32F765xx MCUs.
This part is functionally similar to STM32F767xx (they share a datasheet)
so support is generally comparable.  When adding board support the
stm32f767_af.csv and stm32f767.ld should be used.
2018-09-20 15:16:03 +10:00
Damien George a5b583adfd stm32/boards/STM32F769DISC: Add optional support for external SDRAM. 2018-09-20 11:42:03 +10:00
Damien George 9639e0d26f stm32/sdram: Add support for 32-bit wide data bus and 256MB in MPU cfg. 2018-09-20 11:29:37 +10:00
Damien George 7c4f98db85 stm32/dma: Get DMA working on F0 MCUs.
Changes made:
- fix DMA_SUB_INSTANCE_AS_UINT8
- fix dma_id numbers in dma_descr_t
- add F0 DMA IRQ handlers
- set DmaBaseAddress and ChannelIndex when reinit'ing
2018-09-16 23:16:10 +10:00
Damien George 9fb1f18cf4 stm32/sdcard: Fully reset SDMMC periph before calling HAL DMA functions.
The HAL DMA functions enable SDMMC interrupts before fully resetting the
peripheral, and this can lead to a DTIMEOUT IRQ during the initialisation
of the DMA transfer, which then clears out the DMA state and leads to the
read/write not working at all.  The DTIMEOUT is there from previous SDMMC
DMA transfers, even those that succeeded, and is of duration ~180 seconds,
which is 0xffffffff / 24MHz (default DTIMER value, and clock of
peripheral).

To work around this issue, fully reset the SDMMC peripheral before calling
the HAL SD DMA functions.

Fixes issue #4110.
2018-09-12 17:02:17 +10:00
Damien George 6b3d6da74b stm32/flashbdev: Protect flash writes from cache flushing and USB MSC. 2018-09-12 15:58:42 +10:00
Damien George 0941a467e7 stm32: Change flash IRQ priority from 2 to 6 to prevent preemption.
The flash-IRQ handler is used to flush the storage cache, ie write
outstanding block data from RAM to flash.  This is triggered by a timeout,
or by a direct call to flush all storage caches.

Prior to this commit, a timeout could trigger the cache flushing to occur
during the execution of a read/write to external SPI flash storage.  In
such a case the storage subsystem would break down.

SPI storage transfers are already protected against USB IRQs, so by
changing the priority of the flash IRQ to that of the USB IRQ (what is
done in this commit) the SPI transfers can be protected against any
timeouts triggering a cache flush (the cache flush would be postponed until
after the transfer finished, but note that in the case of SPI writes the
timeout is rescheduled after the transfer finishes).

The handling of internal flash sync'ing needs to be changed to directly
call flash_bdev_irq_handler() sync may be called with the IRQ priority
already raised (eg when called from a USB MSC IRQ handler).
2018-09-12 15:46:04 +10:00
Damien George 6f015d337d stm32/spi: Be sure to set all SPI config values in SPI proto init. 2018-09-11 17:36:11 +10:00
Damien George c26516d40f stm32/sdcard: Move temporary DMA state from BSS to stack. 2018-09-11 17:23:27 +10:00
Damien George e4f7001d9c stm32/sdcard: Use only a single DMA stream for both SDIO TX/RX.
No need to be wasteful on DMA resources.
2018-09-11 17:21:22 +10:00
Damien George d7e2ac4a6a stm32/dma: Reinitialise the DMA if the direction changed on the channel. 2018-09-11 17:19:55 +10:00
Damien George b0c8a94b41 stm32/dma: Pass DMA direction as parameter to dma_init not in cfg struct
Some DMA channels (eg for SDIO) can be used in both directions and this
patch allows such peripherals to dynamically select the DMA direction.
2018-09-11 17:18:06 +10:00
Damien George 47550ef2cd stm32: For MCUs that have PLLSAI allow to set SYSCLK at 2MHz increments.
MCUs that have a PLLSAI can use it to generate a 48MHz clock for USB, SDIO
and RNG peripherals.  In such cases the SYSCLK is not restricted to values
that allow the system PLL to generate 48MHz, but can be any frequency.
This patch allows such configurability for F7 MCUs, allowing the SYSCLK to
be set in 2MHz increments via machine.freq().  PLLSAI will only be enabled
if needed, and consumes about 1mA extra.  This fine grained control of
frequency is useful to get accurate SPI baudrates, for example.
2018-09-11 16:42:57 +10:00
roland 67ee4e2401 stm32/boards/STM32L476DISC: Enable external RTC xtal to get RTC working. 2018-09-11 15:23:19 +10:00
Andrew Leech 670a2a3396 stm32/Makefile: Allow external BOARD_DIR directory to be specified.
This makes it easy to add a custom board definition outside of the
micropython tree, keeping the micropython submodule clean and official.
2018-09-11 15:15:21 +10:00
Damien George a23719e0ad stm32/mboot/main: Use correct formula for DFU download address.
As per ST's DfuSe specification, and following their example code.
2018-09-05 15:22:05 +10:00
Damien George 5f3016c663 stm32/mboot/Makefile: Use -Wno-attributes for ll_usb.c HAL source file.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket.  This patch suppresses
such warnings for this file only.
2018-09-05 15:21:43 +10:00
Damien George 056e0b6293 stm32/spi: Add implementation of low-level SPI protocol.
Can be used, for example, to configure external SPI flash using a hardware
SPI interface (code to be put in a board's bdev.c file):

    STATIC const spi_proto_cfg_t hard_spi_bus = {
        .spi = &spi_obj[5],
        .baudrate = 10000000,
        .polarity = 0,
        .phase = 0,
        .bits = 8,
        .firstbit = SPI_FIRSTBIT_MSB,
    };

    STATIC mp_spiflash_cache_t spi_bdev_cache;

    const mp_spiflash_config_t spiflash_config = {
        .bus_kind = MP_SPIFLASH_BUS_SPI,
        .bus.u_spi.cs = pin_A0,
        .bus.u_spi.data = (void*)&hard_spi_bus,
        .bus.u_spi.proto = &spi_proto,
        .cache = &spi_bdev_cache,
    };

    spi_bdev_t spi_bdev;
2018-08-14 22:10:43 +10:00
Damien George 8300be6d0f stm32/spi: Split out pyb.SPI and machine.SPI bindings to their own files
The aim here is to have spi.c contain the low-level SPI driver which is
independent (not fully but close) of MicroPython objects and methods, and
the higher-level bindings are separated out to pyb_spi.c and machine_spi.c.
2018-08-14 17:11:07 +10:00
forester3 02fbb0a455 stm32/boards/STM32F7DISC: Enable onboard SDRAM.
The default SYSCLK frequency is reduced to 192MHz because SDRAM requires it
to be 200MHz or less.
2018-08-14 16:04:10 +10:00
forester3 502c410214 stm32/boards/STM32F429DISC: Add burst len and autorefresh to SDRAM cfg.
To align with recent changes to sdram.c.
2018-08-14 16:03:13 +10:00
forester3 e562f99263 stm32/sdram: Allow additional config by a board, and tune MPU settings.
- Allow configuration by a board of autorefresh number and burst length.
- Increase MPU region size to 8MiB.
- Make SDRAM region cacheable and executable.
2018-08-14 16:00:14 +10:00
Damien George 86e0b25532 stm32/spi: Round up prescaler calc to never exceed requested baudrate.
Requesting a baudrate of X should never configure the peripheral to have a
baudrate greater than X because connected hardware may not be able to
handle higher speeds.  This patch makes sure to round the prescaler up so
that the actual baudrate is rounded down.
2018-08-10 16:39:47 +10:00
David Lechner 3fccd78aca stm32/dma: Fix spelling of "corresponding" in two locations. 2018-08-10 16:26:25 +10:00
Damien George 7be5bb3672 stm32/adc: Fix ADC reading on F0 MCUs to only sample a single channel.
And increase sampling time to get better results for internal channels.
2018-08-04 13:33:02 +10:00
Damien George c62b23094f stm32/adc: Disable VBAT in read channel helper function.
Prior to this patch, if VBAT was read via ADC.read() or
ADCAll.read_channel(), then it would remain enabled and subsequent reads
of TEMPSENSOR or VREFINT would not work.  This patch makes sure that VBAT
is disabled for all cases that it could be read.
2018-08-04 13:25:43 +10:00
Damien George 5482d84673 stm32/modmachine: Get machine.sleep working on L4 MCUs.
When waking from stop mode most of the system is still in the same state as
before entering stop, so only minimal configuration is needed to bring the
system clock back online.
2018-08-01 17:14:19 +10:00
Damien George c12348700f stm32/extint.h: Use correct EXTI lines for RTC interrupts. 2018-08-01 17:13:49 +10:00
Damien George 21dae87710 stm32/modmachine: Get machine.sleep working on F0 MCUs. 2018-07-31 17:25:53 +10:00
Damien George 9dfbb6cc16 stm32/rtc: Get rtc.wakeup working on F0 MCUs.
The problem was that the EXTI line for the RTC wakeup event is line 20 on
the F0, so the interrupt was not firing.
2018-07-31 17:24:10 +10:00
Damien George f6f6452b6f stm32/Makefile: Use -Wno-attributes for ll_usb.c HAL source file.
A recent version of arm-none-eabi-gcc (8.2.0) will warn about unused packed
attributes in USB_WritePacket and USB_ReadPacket.  This patch suppresses
such warnings for this file only.
2018-07-30 15:35:05 +10:00
Damien George 90fc7c5cfa stm32/sdcard: Get SDMMC alt func macro names working with F4,F7,H7 MCUs. 2018-07-30 15:33:33 +10:00
Andrew Leech 434975defa stm32/boards/STM32F429DISC: Enable onboard SDRAM. 2018-07-23 23:16:32 +10:00
Andrew Leech 968fa47392 stm32/sdram: On F7 MCUs enable MPU on external SDRAM.
This prevents hard-faults on non-aligned accesses.

Reference: http://www.keil.com/support/docs/3777.htm
2018-07-23 23:15:18 +10:00
Andrew Leech a1db1506a2 stm32/sdram: Integrate SDRAM driver into rest of code.
If SDRAM is configured and enabled for a board then it is used for the
MicroPython GC heap.
2018-07-23 23:14:23 +10:00
Andrew Leech 7ae053abfd stm32/sdram: Add SDRAM driver from OpenMV project.
Taken from 7fbe54ad4e/src/omv/sdram.c

Code is is MIT licensed.
2018-07-23 23:13:24 +10:00
Damien George 4201f36a46 stm32/sdcard: Use mp_hal_pin_config_alt_static to configure SD card pins 2018-07-20 14:03:21 +10:00
Andrew Leech 4343c9330e stm32: Add method for statically configuring pin alternate function.
Works with pins declared normally in mpconfigboard.h, eg. (pin_XX), as well
as (pyb_pin_XX).

Provides new mp_hal_pin_config_alt_static(pin_obj, mode, pull, fn_type)
function declared in pin_static_af.h to allow configuring pin alternate
functions by name at compile time.
2018-07-20 14:03:21 +10:00
Peter D. Gray a8736e5c36 stm32/flashbdev: Fix bug with L4 block cache, dereferencing block size.
The code was dereferencing 0x800 and loading a value from there, trying to
use a literal value (not address) defined in the linker script
(_ram_fs_cache_block_size) which was 0x800.
2018-07-19 12:15:34 +10:00
Peter D. Gray 0d58f6ba5e stm32/mphalport: Make mp_hal_stdin_rx_chr/stdout_tx_strn weakly linked.
To allow for customizations.
2018-07-18 10:41:55 +10:00
Damien George 46091b8a95 stm32/timer: Add tick_hz arg to Timer constructor and init method.
The period of the timer can now be specified using the "period" and
"tick_hz" args.  The period in seconds will be: period/tick_hz.  tick_hz
defaults to 1000, so if period is specified on its own then it will be in
units of milliseconds.
2018-07-17 13:36:36 +10:00
Damien George 821b59d439 stm32/timer: Use enum for indexing keyword arg in pyb_timer_init_helper. 2018-07-17 13:22:42 +10:00
Peter D. Gray 2a3979bcb3 stm32/fatfs_port: Fix bug when MICROPY_HW_ENABLE_RTC not enabled.
Prior to this patch, get_fattime() was calling a HAL RTC function with the
HW instance pointer as null because rtc_init_start() was never called.

Also marked it as a weak function, to allow a board to override it.
2018-07-14 17:17:46 +10:00
Damien George e1ae9939ac stm32: Support compiling with object representation D.
With this and previous patches the stm32 port can now be compiled using
object representation D (nan boxing).  Note that native code and frozen mpy
files with float constants are currently not supported with this object
representation.
2018-07-08 23:25:11 +10:00
Damien George 3503f9626a stm32: Access dict map directly instead of using helper function. 2018-07-08 22:11:28 +10:00
Damien George 8f86fbfd6c ports: Enable ure.sub() on stm32, esp8266 (not 512k) and esp32. 2018-07-02 15:13:18 +10:00
Damien George 9b158d60e1 stm32/mboot: Always use a flash latency of 1WS to match 48MHz HCLK. 2018-06-26 00:06:04 +10:00
Damien George 967123d42e stm32/mboot: Only compile in code for the USB periph that is being used.
Prior to this patch, if both USB FS and HS were enabled via the
configuration file then code was included to handle both of their IRQs.
But mboot only supports listening on a single USB peripheral, so this patch
excludes the code for the USB that is not used.
2018-06-26 00:02:36 +10:00
Damien George 37c4fd3b50 stm32/mboot: Fix bug with invalid memory access of USB state.
Only one of pcd_fs_handle/pcd_hs_handle is ever initialised, so if both of
these USB peripherals are enabled then one of these if-statements will
access invalid memory pointed to by an uninitialised Instance.  This patch
fixes this bug by explicitly referencing the peripheral struct.
2018-06-25 23:39:46 +10:00