We were writing with quad page program including the address (0x38)
which is unsupported by the GD25Q16C but it is supported by the
flash on the DK. So, we use the single address, quad data command
(0x32).
This started while adding USB MIDI support (and descriptor support is
in this change.) When seeing that I'd have to implement the MIDI class
logic twice, once for atmel-samd and once for nrf, I decided to refactor
the USB stack so its shared across ports. This has led to a number of
changes that remove items from the ports folder and move them into
supervisor.
Furthermore, we had external SPI flash support for nrf pending so I
factored out the connection between the usb stack and the flash API as
well. This PR also includes the QSPI support for nRF.
Temporarly solving the issue of
"differ from the size of original declaration [-Werror=lto-type-mismatch]
until linker is fixed in upcomming release of gcc.
Bug is reported by others, and will be fixed in next version of arm-gcc.
However, this patch makes it possible to use modmusic and modimage
with current compilers.
Alternativly, the code can be compiled with LTO=0, but uses valuable 9K
more on this already squeezed target (microbit).
Support added for s132/s140 v6 in linker scripts and boards.
Support removed for s132 v2/3/5.
Download script updated to fetch new stacks and removed the
non-supported ones.
ble_drv.c updated to only handle s110 v8, and s132/s140 v6.
ubluepy updated to continue scanning after each individual scan
report reported to the module to keep old behaviour of the
Scanner class.
This patch generalize the feather52 target to be a board without
an in-built Bluetooth stack or bootloader giving all flash memory to
micropython code.
This way the feather52 target can run any supported Bluetooth LE
stack the port supports for other nrf52832 targets. Hence, this
make Makefiles/linker scripts and BLE driver support easier
to maintain in the future.
dfu-gen .PHONY target is run unconditionally as first build
target when included, and might fail if the hex file is not
yet generated.
To prevent this, the dfu-gen and dfu-flash targets are moved
to the main Makefile and only exposed if feather52 is the
defined BOARD.
Removing unused nrf52832_512k_64k_s132_5.0.0.ld.
Adding new linker script s132_5.0.0 following new
linker script scheme.
Updating ble_drv.c to handle de-increment of
outstanding tx packets on hvx for s132 v5.
Renaming config for enabling random module with hw
random number generator from MICROPY_PY_HW_RNG to
MICROPY_PY_RANDOM_HW_RNG to indicate which module it
is configuring.
Also, disabling the config by default in mpconfigport.h.
Adding the enable of RNG in all board configs.
Moving ifdef in modrandom, which test for the config being
set, earlier in the code. This is to prevent un-necessary
includes if not needed.
This patch ads irq method to the pin object. Handlers
registered in the irq method will be kept as part of the
ROOT_POINTERS.
In order to resolve which pin object is the root of the
IRQ, the pin_find has been extended to also be able to
search up Pin objects based on mp_int_t pin number.
This also implies that the Pin.new API is now also supporting
creation of Pin objects based on the integer value of the
pin instead of old style mandating string name of the Pin.
All boards have been updated to use real pin number from
0-48 instead of pin_Pxx for UART/SPI and music module pins.
UART/SPI/modmusic has also been updated to use pin number
provided directly or look up the Pin object based on the
integer value of the pin (modmusic).
Pin generation has been updated to create a list of pins, where
the board/cpu dicts are now refering to an index in this list
instead of having one const declaration for each pin. This new
const table makes it possible to iterate through all pins generated
in order to locate the correct Pin object.
In order to be able to support GPIO1 port on nrf52840
the port has been removed from the Pin object.
All pins on port1 will now be incrementally on top of
the pin numbers for gpio0. Hence, Pin 1.00 will become
P32, and Pin 1.15 will become P47.
The modification is done to address the new gpio HAL
interface in nrfx, which resolves the port to be
configured base on a multiple of 32.
The patch also affects the existing devices which does
not have a second GPIO port in the way that the
port indication A and B is removed from Pin generation.
This means that the port which was earlier addressed
as PA0 is now P0, and PA31 is P31.
Also, this patch removes the gpio member which earlier
pointed to the perihperal GPIO base address. This is not
needed anymore, hence removed.
