circuitpython

Commit Graph

Author	SHA1	Message	Date
Damien George	b766e79510	stmhal: Initial implementation of cc3k module and driver. Pulled in and modified work done by mux/iabdalkader on cc3k driver, from iabdalkader-cc3k-update branch. That branch was terribly messy and had too many conflicts to merge neatly.	2014-09-26 00:57:26 +01:00
Damien George	bcf041f1a3	stmhal: Add wiznet5k module, to control WIZnet ethernet adaptor. Allows to create socket objects that support TCP and UDP in server and client mode. Interface is very close to standard Python socket class, except bind and accept do not work the same (due to hardware not supporting them in the usual way). Not compiled by default. To compile this module, use: make MICROPY_PY_WIZNET5K=1	2014-09-01 22:52:38 +01:00

Author

SHA1

Message

Date

Damien George

b766e79510

stmhal: Initial implementation of cc3k module and driver.

Pulled in and modified work done by mux/iabdalkader on cc3k driver, from
iabdalkader-cc3k-update branch.  That branch was terribly messy and had
too many conflicts to merge neatly.

2014-09-26 00:57:26 +01:00

Damien George

bcf041f1a3

stmhal: Add wiznet5k module, to control WIZnet ethernet adaptor.

Allows to create socket objects that support TCP and UDP in server and
client mode.  Interface is very close to standard Python socket class,
except bind and accept do not work the same (due to hardware not
supporting them in the usual way).

Not compiled by default.  To compile this module, use:
make MICROPY_PY_WIZNET5K=1

2014-09-01 22:52:38 +01:00

2 Commits