To let unix port implement "machine" functionality on Python level, and
keep consistent naming in other ports (baremetal ports will use magic
module "symlinking" to still load it on "import machine").
Fixes#1701.
This is refactoring to enable support for the two USB PHYs available on
some STM32F4 processors to be used at the same time. The F405/7 & F429
have two USB PHYs, others such as the F411 only have one PHY.
This has been tested separately on a pyb10 (USB_FS PHY) and F429DISC
(USB_HS PHY) to be able to invoke a REPL/USB. I have modified a PYBV10
to support two PHYs.
The long term objective is to support a 2nd USB PHY to be brought up as a
USB HOST, and possibly a single USB PHY to be OTG.
py/mphal.h contains declarations for generic mp_hal_XXX functions, such
as stdio and delay/ticks, which ports should provide definitions for. A
port will also provide mphalport.h with further HAL declarations.
Previous to this patch the printing mechanism was a bit of a tangled
mess. This patch attempts to consolidate printing into one interface.
All (non-debug) printing now uses the mp_print* family of functions,
mainly mp_printf. All these functions take an mp_print_t structure as
their first argument, and this structure defines the printing backend
through the "print_strn" function of said structure.
Printing from the uPy core can reach the platform-defined print code via
two paths: either through mp_sys_stdout_obj (defined pert port) in
conjunction with mp_stream_write; or through the mp_plat_print structure
which uses the MP_PLAT_PRINT_STRN macro to define how string are printed
on the platform. The former is only used when MICROPY_PY_IO is defined.
With this new scheme printing is generally more efficient (less layers
to go through, less arguments to pass), and, given an mp_print_t*
structure, one can call mp_print_str for efficiency instead of
mp_printf("%s", ...). Code size is also reduced by around 200 bytes on
Thumb2 archs.
Given that there's already support for "fixed table" maps, which are
essentially ordered maps, the implementation of OrderedDict just extends
"fixed table" maps by adding an "is ordered" flag and add/remove
operations, and reuses 95% of objdict code, just making methods tolerant
to both dict and OrderedDict.
Some things are missing so far, like CPython-compatible repr and comparison.
OrderedDict is Disabled by default; enabled on unix and stmhal ports.
These allow to fine-tune the compiler to select whether it optimises
tuple assignments of the form a, b = c, d and a, b, c = d, e, f.
Sensible defaults are provided.
The implementation of these functions is very large (order 4k) and they
are rarely used, so we don't enable them by default.
They are however enabled in stmhal and unix, since we have the room.
It uses RAM and on pyboard we are generally tight on RAM, so disable
this optimisation for general builds. If users need the speed then
they can build their own version. Maybe in the future we can have
different versions of pyboard firmware built with different tradeoffs.
Compiler optimises lookup of module.CONST when enabled (an existing
feature). Disabled by default; enabled for unix, windows, stmhal.
Costs about 100 bytes ROM on stmhal.
This allows to enable mem-info functions in micropython module, even if
MICROPY_MEM_STATS is not enabled. In this case, you get mem_info and
qstr_info but not mem_{total,current,peak}.
This is a simple optimisation inspired by JITing technology: we cache in
the bytecode (using 1 byte) the offset of the last successful lookup in
a map. This allows us next time round to check in that location in the
hash table (mp_map_t) for the desired entry, and if it's there use that
entry straight away. Otherwise fallback to a normal map lookup.
Works for LOAD_NAME, LOAD_GLOBAL, LOAD_ATTR and STORE_ATTR opcodes.
On a few tests it gives >90% cache hit and greatly improves speed of
code.
Disabled by default. Enabled for unix and stmhal ports.
This patch adds a configuration option (MICROPY_CAN_OVERRIDE_BUILTINS)
which, when enabled, allows to override all names within the builtins
module. A builtins override dict is created the first time the user
assigns to a name in the builtins model, and then that dict is searched
first on subsequent lookups. Note that this implementation doesn't
allow deleting of names.
This patch also does some refactoring of builtins code, creating the
modbuiltins.c file.
Addresses issue #959.
This patch also enables non-blocking streams on stmhal port.
One can now make a USB-UART pass-through function:
def pass_through(usb, uart):
while True:
select.select([usb, uart], [], [])
if usb.any():
uart.write(usb.read(256))
if uart.any():
usb.write(uart.read(256))
pass_through(pyb.USB_VCP(), pyb.UART(1, 9600))
os, time, select modules are now prefixed with u, but are still
available (via weak links) as their original names.
ure and ujson now available as re and json via weak links.
As per issue #876, the network module is used to configure NICs
(hardware modules) and configure routing. The usocket module is
supposed to implement the normal Python socket module and selects the
underlying NIC using routing logic.
Right now the routing logic is brain dead: first-initialised,
first-used. And the routing table is just a list of registered NICs.
cc3k and wiznet5k work, but not at the same time due to C name clashes
(to be fixed).
Note that the usocket module has alias socket, so that one can import
socket and it works as normal. But you can also override socket with
your own module, using usocket at the backend.
Pulled in and modified work done by mux/iabdalkader on cc3k driver, from
iabdalkader-cc3k-update branch. That branch was terribly messy and had
too many conflicts to merge neatly.
