If MICROPY_PY_SYS_PATH_ARGV_DEFAULTS is enabled (which it is by default)
then sys.path and sys.argv will be initialised and populated with default
values. This keeps all bare-metal ports aligned.
Signed-off-by: Damien George <damien@micropython.org>
Frozen modules will be searched preferentially, but gives the user the
ability to override this behavior.
This matches the previous behavior where "" was implicitly the frozen
search path, but the frozen list was checked before the filesystem.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
This commit implements 10/100 Mbit Ethernet support in the mimxrt port.
The following boards are configured without ETH network:
- MIMXRT1010_EVK
- Teensy 4.0
The following boards are configured with ETH network:
- MIMXRT1020_EVK
- MIMXRT1050_EVK
- MIMXRT1060_EVK
- MIMXRT1064_EVK
- Teensy 4.1
Ethernet support tested with TEENSY 4.1, MIMRTX1020_EVK and MIMXRT1050_EVK.
Build tested with Teensy 4.0 and MIMXRT1010_EVK to be still working.
Compiles and builds properly for MIMXRT1060_EVK and MIMXRT1064_EVK, but not
tested lacking suitable boards.
Tested functions are:
- ping works bothway
- simple UDP transfer works bothway
- ntptime works
- the ftp server works
- secure socker works
- telnet and webrepl works
The MAC address is 0x02 plus 5 bytes from the manifacturing info field,
which can be considered as unique per device.
Some boards do not wire the RESET and INT pin of the PHY transceiver. For
operation, these are not required. If they are defined, they will be used.
This commit adds full support for a filesystem on all boards, with a block
device object mimxrt.Flash() and uos.VfsLfs2 enabled.
Main changes are:
- Refactoring of linker scripts to accomodate reserved area for VFS. VFS
will take up most of the available flash. 1M is reserved for code. 9K is
reserved for flash configuration, interrupts, etc.
- Addition of _boot.py with filesystem init code, called from main.c.
- Definition of the mimxrt module with a Flash class in modmimxrt.[ch].
- Implementation of a flash driver class in mimxrt_flash.c. All flashing
related functions are stored in ITCM RAM.
- Addition of the uos module with filesystem functions.
- Implementation of uos.urandom() for the sake of completeness of the uos
module.
It uses sample code from CircuitPython supplied under MIT license, which
uses the NXP SDK example code.
Done in collaboration with Philipp Ebensberger aka @alphaFred who
contributed the essential part to enable writing to flash while code is
executing, among other things.
SysTick cannot wake the CPU from WFI/WFE so a hardware timer is needed to
keep track of ticks/delay (similar to the nrf port).
Fixes issue #7234.
Signed-off-by: Damien George <damien@micropython.org>
This commit implements an LED class with rudimentary parts of a pin C API
to support it. The LED class does not yet support setting an intensity.
This LED class is put in the machine module for the time being, until a
better place is found.
One LED is supported on TEENSY40 and MIMXRT1010_EVK boards.
No functionality change is intended with this commit, it just consolidates
the separate implementations of GC helper code to the lib/utils/ directory
as a general set of helper functions useful for any port. This reduces
duplication of code, and makes it easier for future ports or embedders to
get the GC implementation correct.
Ports should now link against gchelper_native.c and either gchelper_m0.s or
gchelper_m3.s (currently only Cortex-M is supported but other architectures
can follow), or use the fallback gchelper_generic.c which will work on
x86/x64/ARM.
The gc_helper_get_sp function from gchelper_m3.s is not really GC related
and was only used by cc3200, so it has been moved to that port and renamed
to cortex_m3_get_sp.
This is an extremely minimal port to the NXP i.MX RT, in the style of the
SAMD port It's largely based on the TinyUSB mimxrt implementation, using
the NXP SDK. It currently supports the Teensy 4.0 board with a REPL over
the USB-VCP interface.
This commit also adds the NXP SDK submodule (also from TinyUSB) to
lib/nxp_driver.
Note: if you already have the tinyusb submodule initialized recursively you
will need to run the following as the tinyusb sub-submodules have been
rearranged (upstream):
git submodule deinit lib/tinyusb
rm -rf .git/modules/lib/tinyusb
git submodule update --init lib/tinyusb
