Commit Graph

13 Commits

Author SHA1 Message Date
Damien George e43a74a4db drivers/memory/spiflash: Add MICROPY_HW_SPIFLASH_ENABLE_CACHE option.
This only needs to be enabled if a board uses FAT FS on external SPI flash.
When disabled (and using external SPI flash) 4k of RAM can be saved.

Signed-off-by: Damien George <damien@micropython.org>
2020-12-18 13:39:32 +11:00
Andrew Leech 30501d3f54 drivers, stm32: Support SPI/QSPI flash chips over 16MB.
With a SPI flash that has more than 16MB, 32-bit addressing is required
rather than the standard 24-bit.  This commit adds support for 32-bit
addressing so that the SPI flash commands (read/write/erase) are selected
automatically depending on the size of the address being used at each
operation.
2020-01-30 13:18:38 +11:00
Damien George 8cde5faedd drivers/memory/spiflash: Add support to put SPI flash in sleep mode. 2019-07-03 01:27:33 +10:00
Andrew Leech 2ed2ec1711 drivers/memory/spiflash: Rework wait_sr to fix uninit'd variable 'sr'. 2019-03-08 23:11:13 +11:00
Damien George b78ca32476 drivers/memory/spiflash: Add functions for direct erase/read/write.
These new API functions do not use the cache.
2018-06-14 16:52:56 +10:00
Damien George cc5a94044a drivers/memory/spiflash: Rename functions to indicate they use cache.
This patch renames the existing SPI flash API functions to reflect the fact
that the go through the cache:

    mp_spiflash_flush -> mp_spiflash_cache_flush
    mp_spiflash_read  -> mp_spiflash_cached_read
    mp_spiflash_write -> mp_spiflash_cached_write
2018-06-14 16:52:56 +10:00
Damien George 86fe73beb9 drivers/memory/spiflash: Move cache buffer to user-provided config.
This patch removes the global cache variables from the SPI flash driver and
now requires the user to provide the cache memory themselves, via the SPI
flash configuration struct.  This allows to either have a shared cache for
multiple SPI flash devices (by sharing a mp_spiflash_cache_t struct), or
have a single cache per device (or a mix of these options).

To configure the cache use:

    mp_spiflash_cache_t spi_bdev_cache;

    const mp_spiflash_config_t spiflash_config =
        // any bus options
        .cache = &spi_bdev_cache,
    };
2018-06-14 16:52:56 +10:00
Damien George bdc875e602 drivers/memory/spiflash: Fix bugs in and clean up read/write functions.
mp_spiflash_read had a bug in it where "dest" and "addr" were incremented
twice for a certain special case.  This was fixed, which then allowed the
function to be simplified to reduce code size.

mp_spiflash_write had a bug in it where "src" was not incremented correctly
for the case where the data to be written included the caching buffer as
well as some bytes after this buffer.  This was fixed and the resulting
code simplified.
2018-03-13 14:13:30 +11:00
Damien George cc34b087f0 drivers/memory/spiflash: Fix setting of QE bit in flash register. 2018-03-11 11:25:38 +11:00
Damien George a739b35a96 drivers/memory/spiflash: Change to use low-level SPI object not uPy one.
This patch alters the SPI-flash memory driver so that it uses the new
low-level C SPI protocol (from drivers/bus/spi.h) instead of the uPy SPI
protocol (from extmod/machine_spi.h).  This allows the SPI-flash driver to
be used independently from the uPy runtime.
2018-03-10 00:59:43 +11:00
Damien George 4e48700f9a drivers/memory/spiflash: Add support for QSPI interface.
The spiflash memory driver is reworked to allow the underlying bus to be
either normal SPI or QSPI.  In both cases the bus can be implemented in
software or hardware, as long as the spiflash driver is passed the correct
configuration structure.
2018-03-02 23:54:09 +11:00
Damien George 613510bce8 drivers/memory/spiflash: Change from hard-coded soft SPI to generic SPI.
The SPI flash driver now supports using an arbitrary SPI object to
communicate with the flash chip, and in particular can use a hardware SPI
peripheral.
2017-08-29 11:37:18 +10:00
Damien George 784e023a26 drivers/memory: Add SPI flash driver, written in C. 2017-01-24 16:56:03 +11:00