And put back our magic number, because our bytecode format differs
from upstream
drop btree & framebuf natmods, they had additional problems I didn't
want to fix right now.
This reduces the stack frame size of mp_builtin___import__ by
limiting the support path length of files from 256 to 96. This
function can be called recursively for nested imports so it adds up.
Also reduce mp_execute_bytecode (vm.c) from 206 a bc call to 124.
This too is recursive and adds up. It is reduced by preventing
some inlining. It may decrease performance slightly when importing
and unpacking.
Adds two new scripts for debugging. One is used from gdb to print
frame sizes in a backtrace. The other prints what pcs use a
particular stack offset. This helps find infrequently used stack
space.
Fixes#8053.
This adds a script to generate the peripherals files (except clock).
It adds support for the 1015, 1020, 1040, and 1050 EVKs.
Some work was started on 1176 but it isn't working. So, the board
def is in a separate branch.
Fixes#3521. Fixes#2477.
PicoDVI in CP support 640x480 and 800x480 on Feather DVI, Pico and
Pico W. 1 and 2 bit grayscale are full resolution. 8 and 16 bit
color are half resolution.
Memory layout is modified to give the top most 4k of ram to the
second core. Its MPU is used to prevent flash access after startup.
The port saved word is moved to a watchdog scratch register so that
it doesn't get overwritten by other things in RAM.
Right align status bar and scroll area. This normally gives a few
pixels of padding on the left hand side and improves the odds it is
readable in a case. Fixes#7562
Fixes c stack checking. The length was correct but the top was being
set to the current stack pointer instead of the correct top.
Fixes#7643
This makes Bitmap subscr raise IndexError instead of ValueError
when the index arguments are wrong.
Doing a squash merge to avoid having the `slc_cli_linux` .zip files in the history. They were added in one commit and removed and replaced with a submodule in another.
* Initial commit for xg24
* Fix SLC issue
* Fix SLC extract fail
* Change board's name
* Correct spelling of code
Build immediately after slc generate
* Remove VID and PID
* Change creator and creation id
* Apply new creator_id and creation_id
* Update makefile, error message, mcu_processor function
* Update mpconfigboard.mk
* Update Board extensions, PORT_DEPS
* Update makefile
* Add exclude_patterns
* Show java, jinja2 version
* Show path for debugging CI
* Add requirements-dev for slc
* Add PATH slc_cli
* Update background function
* Add jinja2 PATH
* Show PATH
* Update jinja2 path
* Update jinja2 path
* Update jinja2 path
* Update jinja2 path
* Change slc folder
* Change markupsafe folder
* Add symbolic link for slc
* Update makefile
* Update makefile
* Update MX25R3235F.toml from submodule nvm.toml
* alphabetize the list
* Remove slc_cli_linux folder
* Update slc_cli submodule
---------
Co-authored-by: Chat Nguyen <cvnguyen@silabs.com>
Co-authored-by: silabs-ChatNguyen <chat.nguyen@silabs.com>
Co-authored-by: silabs-ChatNguyen <126220343+silabs-ChatNguyen@users.noreply.github.com>
* Enable dcache for OCRAM where the VM heap lives.
* Add CIRCUITPY_SWO_TRACE for pushing program counters out over the
SWO pin via the ITM module in the CPU. Exempt some functions from
instrumentation to reduce traffic and allow inlining.
* Place more functions in ITCM to handle errors using code in RAM-only
and speed up CP.
* Use SET and CLEAR registers for digitalio. The SDK does read, mask
and write.
* Switch to 2MiB reserved for CircuitPython code. Up from 1MiB.
* Run USB interrupts during flash erase and write.
* Allow storage writes from CP if the USB drive is disabled.
* Get perf bench tests running on CircuitPython and increase timeouts
so it works when instrumentation is active.
