This reverts commit 7e6e824d5655026906b6515070aeb604d2ef3426.
Fixes#7770
The change in #7623 needs to be revered; the raise-site added in #7632
is the correct one and the one in socketpool needs to be reverted.
This is not affecting 8.0.x because #7623 was not back-ported to there
before we realized it was not a full fix.
Both #7770 and #7606 should be re-tested. I didn't test.
tested on metro m7 (green prototype version) with max98357a i2s amplifier and the following test code:
```py
import board
import time
import digitalio
from audiobusio import I2SOut
from audiocore import RawSample
from microcontroller import pin
from ulab import numpy as np
n = np.array(np.sin(np.linspace(0, np.pi*2, 218, endpoint=False)) * 200, dtype=np.int16)
print(n)
r = RawSample(n, sample_rate=8000, channel_count=2)
def main():
with digitalio.DigitalInOut(board.LED) as l:
l.switch_to_output(True)
value = False
while True:
with I2SOut(pin.GPIO_06, pin.GPIO_07, pin.GPIO_04) as i:
time.sleep(.01)
l.value = value = not value
i.play(r, loop=True)
print(i.playing)
time.sleep(.5)
i.stop()
print("STOPPED")
print(i.playing)
time.sleep(.5)
i.play(r, loop=True)
print(i.playing)
print("PLAY AGAIN")
time.sleep(.5)
time.sleep(1)
```
Only stereo, 16-bit, raw samples were tested; the sample rate is actually fixed
at 48kHz in the core right now. There is more to do, but the basics work.
# Conflicts:
# ports/mimxrt10xx/Makefile
# ports/mimxrt10xx/mpconfigport.mk
* Enable dcache for OCRAM where the VM heap lives.
* Add CIRCUITPY_SWO_TRACE for pushing program counters out over the
SWO pin via the ITM module in the CPU. Exempt some functions from
instrumentation to reduce traffic and allow inlining.
* Place more functions in ITCM to handle errors using code in RAM-only
and speed up CP.
* Use SET and CLEAR registers for digitalio. The SDK does read, mask
and write.
* Switch to 2MiB reserved for CircuitPython code. Up from 1MiB.
* Run USB interrupts during flash erase and write.
* Allow storage writes from CP if the USB drive is disabled.
* Get perf bench tests running on CircuitPython and increase timeouts
so it works when instrumentation is active.
The original list left D4 (GPIO4), VN (GPIO39) and VP (GPIO36) out.
Added aliases for 1, 3, 16 and 17 with their GPIO names, even though they won't be used as such since they are UART0 and UART2
