Commit Graph

2924 Commits

Author SHA1 Message Date
stijn
dc1ea1156a Exclude some tests which always fail on windows 2014-10-05 09:32:26 +02:00
stijn
a2f9c9445a Enable unicode for Windows port so unicode tests give correct uPy output 2014-10-04 09:16:20 +02:00
Damien George
24119176e7 stmhal: Allow pyb.freq() function to change SYSCLK frequency.
Eg pyb.freq(120000000) sets the CPU to 120MHz.  The frequency can be set
at any point in the code, and can be changed as many times as you like.
Note that any active timers will need to be reconfigured after a freq
change.

Valid range is 24MHz to 168MHz (but not all freqs are supported).  The
code maintains a 48MHz clock for the USB at all times and it's possible
to change the frequency at a USB REPL and keep the REPL alive (well,
most of the time it stays, sometimes it resets the USB for some reason).
Note that USB does not work with pyb.freq of 24MHz.
2014-10-04 01:54:31 +01:00
Damien George
c568a2b443 stmhal: Adjust computation of SYSCLK to retain precision. 2014-10-04 01:54:02 +01:00
Damien George
1f2558d647 Merge pull request #889 from Vogtinator/master
Implement missing ARM emitter functions for viper
2014-10-04 00:26:05 +01:00
Fabian Vogt
e5268963c6 Implement missing ARM emitter functions for viper 2014-10-04 00:57:21 +02:00
Damien George
00be7a849a py: Fix unix-cpy to compile with uint->mp_uint_t changes. 2014-10-03 20:05:44 +01:00
Damien George
39dc145478 py: Change [u]int to mp_[u]int_t in qstr.[ch], and some other places.
This should pretty much resolve issue #50.
2014-10-03 19:52:22 +01:00
Damien George
3eaa0c3833 py: Use UINT_FMT instead of %d. 2014-10-03 17:54:25 +00:00
Damien George
42f3de924b py: Convert [u]int to mp_[u]int_t where appropriate.
Addressing issue #50.
2014-10-03 17:44:14 +00:00
Damien George
877dba3e1a drivers: Add NRF24L01 driver (written in pure Python).
Comes with test script.  Copy both files to pyboard and run
"import nrf24l01test".
2014-10-02 19:36:56 +01:00
Damien George
e535a61983 tests: Add simple CAN test. 2014-10-02 17:32:02 +01:00
Damien George
3550de4ebe stmhal: Add basic CAN bus support. 2014-10-02 17:32:02 +01:00
Damien George
5fc6aa8100 stmhal: Set is_enabled=false when creating UART object; fix doc typo. 2014-10-02 17:31:37 +01:00
Damien George
0bbe4de527 stmhal: Update help text.
Remove reference to pyb.gc; add reference to pyb.millis.

There are lots of functions not listed when you run help(), but it would
be too much to list them all, so we list only some basic, useful ones.

Addresses issue #846.
2014-10-02 14:51:17 +01:00
blmorris
3b064370f8 Enable device keyword option when running pyboard.py --tests and run-tests --pyboard 2014-10-01 23:31:52 +01:00
Damien George
762d57519d unix: Do a proper clean-up on sys.exit/SystemExit.
Addresses issue #859.
2014-10-01 23:18:39 +01:00
Dave Hylands
d368611ea6 Proposed fix for USB Mass Storage. 2014-10-01 22:52:02 +01:00
Damien George
c737086e1c tools: Add network build to auto-build script. 2014-09-30 23:04:08 +00:00
Damien George
de37775a26 stmhal: Enable patch_program in cc3k driver, with key. 2014-09-30 23:43:38 +01:00
Damien George
e5cc4b2503 stmhal: Fix wiznet5k init of SPI bus. 2014-09-30 23:34:18 +01:00
Damien George
8762418d0c drivers, cc3000: Wrap exported functions in a macro for renaming. 2014-09-30 23:25:42 +01:00
Damien George
9d2bf9c405 drivers, wiznet5k: Wrap exported functions in a macro for renaming.
3rd party drivers should not export generic names like "close".
2014-09-30 22:51:47 +01:00
Damien George
3a1c4c5bc6 stmhal: Add network and usocket module.
As per issue #876, the network module is used to configure NICs
(hardware modules) and configure routing.  The usocket module is
supposed to implement the normal Python socket module and selects the
underlying NIC using routing logic.

Right now the routing logic is brain dead: first-initialised,
first-used.  And the routing table is just a list of registered NICs.

cc3k and wiznet5k work, but not at the same time due to C name clashes
(to be fixed).

Note that the usocket module has alias socket, so that one can import
socket and it works as normal.  But you can also override socket with
your own module, using usocket at the backend.
2014-09-30 22:36:47 +01:00
Damien George
bfa7b480a7 stmhal: For spi_init, add argument to select if NSS pin is enabled.
Most of the time you don't use the NSS pin of the SPI bus, and so it
shouldn't be enabled by default (this gave some bugs in the past).
2014-09-30 22:36:47 +01:00
Damien George
8b03d944e2 py: Remove IOError since it's deprecated; use OSError instead.
In CPython IOError (and EnvironmentError) is deprecated and aliased to
OSError.  All modules that used to raise IOError now raise OSError (or a
derived exception).

In Micro Python we never used IOError (except 1 place, incorrectly) and
so don't need to keep it.

See http://legacy.python.org/dev/peps/pep-3151/ for background.
2014-09-30 13:59:30 +00:00
Damien George
1c6a1dc740 py: Allow x86-64 to mov r16 to rm16 with extended src reg.
Fixes bug with x86-64 viper ptr16.
2014-09-29 22:44:18 +01:00
Damien George
dfef4249eb py: Fix viper store on x86; add tests for viper ptr16. 2014-09-29 21:41:41 +00:00
Damien George
e9dac3b4d0 py: Add casting to viper; add native mem stores to viper.
Viper can now do the following:

def store(p:ptr8, c:int):
    p[0] = c

This does a store of c to the memory pointed to by p using a machine
instructions inline in the code.
2014-09-29 22:10:41 +01:00
Damien George
44c96b2314 tests: Add tests for viper binary operations. 2014-09-29 19:42:06 +01:00
Damien George
3112cde900 py: Implement more binary ops for viper emitter.
This included a bit of restructuring of the assembler backends.  Note
that the ARM backend is missing a few functions and won't compile.
2014-09-29 19:42:06 +01:00
Damien George
6f81348fa2 py: Allow viper to use ints as direct conditionals in jumps.
Allows things like: if 1: ...
2014-09-29 19:42:06 +01:00
Damien George
a7329615eb py: Fix types, uint -> mp_uint_t. 2014-09-29 19:42:06 +01:00
Damien George
0b610de017 py: Make macro names in assemblers consistent, and tidy up a bit. 2014-09-29 19:42:06 +01:00
Damien George
d66e48662b py: Add store r8 and store r16 ops to asm_x86 and asm_x64. 2014-09-29 19:42:06 +01:00
Damien George
851f15f34c py: In asmthumb, clean up unit/int types and ite ops. 2014-09-29 19:42:06 +01:00
Damien George
860805aae7 unix: Remove unnecessary #defines from config. 2014-09-29 19:41:49 +01:00
Damien George
41249e17c3 stmhal, fatfs: Use stdlib for string fns; make all private fns static.
We save some code bytes by using builtin string functions.
2014-09-29 15:26:46 +01:00
Damien George
3a2795e200 stmhal: Add label to internal flash drive on creation. 2014-09-29 15:26:11 +01:00
Damien George
f042d7a4d7 stmhal: Fix edge case for timer PWM of 100%.
Also improve precision of calculating PWM percent in integer mode.
Also update teensy with edge case fix.
2014-09-29 14:15:01 +01:00
Damien George
853708738e Merge pull request #881 from dhylands/elapsed
Added pyb.elapsed_millis and pyb.elapsed_micros
2014-09-29 12:42:31 +01:00
Damien George
6e2051377f Merge pull request #880 from dhylands/irq-align
teensy: Enable 8-byte stack alignment for IRQ Handlers.
2014-09-29 12:22:53 +01:00
Damien George
305c4d49be Merge pull request #878 from bvernoux/master
Fix error: unknown type name 'size_t'
2014-09-29 12:22:16 +01:00
Damien George
bf683e6b32 Merge pull request #877 from dhylands/timer-overflow
Fix timer overflow code.
2014-09-29 12:18:48 +01:00
Dave Hylands
a21f56b2d5 Added pyb.elapsed_millis and pyb.elapsed_micros
tested using:
stmhal: https://github.com/dhylands/upy-examples/blob/master/elapsed.py
teensy: https://github.com/dhylands/upy-examples/blob/master/teensy/elapsed.py
2014-09-28 11:24:44 -07:00
Dave Hylands
ada691e704 teensy: Enable 8-byte stack alignment for IRQ Handlers. 2014-09-28 10:17:44 -07:00
bvernoux
f6f248b464 Fix error: unknown type name 'size_t' 2014-09-28 09:54:35 +02:00
Dave Hylands
39296b40d4 Fix timer overflow code.
Teensy doesn't need to worry about overflows since all of
its timers are only 16-bit.

For PWM, the pulse width needs to be able to vary from 0..period+1
(pulse-width == period+1 corresponds to 100% PWM)

I couldn't test the 0xffffffff cases since we can't currently get a
period that big in python. With a prescaler of 0, that corresponds
to a freq of 0.039 (i.e. cycle every 25.56 seconds), and we can't
set that using freq or period.

I also tested both stmhal and teensy with floats disabled, which
required a few other code changes to compile.
2014-09-27 19:40:37 -07:00
Damien George
f90b59e610 stmhal, modcc3k: Add ioctl to cc3k sockets so select works. 2014-09-26 13:52:41 +00:00
Damien George
133b083b89 py: Clean up nlr*.S to make it easier to read; fix clang .bss error.
It seems that newer versions of clang don't like the .bss directive, so
we don't use it for OSX.

Addressing issues #865 and #875.
2014-09-26 13:07:26 +00:00