Commit Graph

8 Commits

Author SHA1 Message Date
Scott Shawcroft 40118bcf57
Add `board_deinit` for use with sleep
This changes lots of files to unify `board.h` across ports. It adds
`board_deinit` when CIRCUITPY_ALARM is set. `main.c` uses it to
deinit the board before deep sleeping (even when pretending.)

Deep sleep is now a two step process for the port. First, the
port should prepare to deep sleep based on the given alarms. It
should set alarms for both deep and pretend sleep. In particular,
the pretend versions should be set immediately so that we don't
miss an alarm as we shutdown. These alarms should also wake from
`port_idle_until_interrupt` which is used when pretending to deep
sleep.

Second, when real deep sleeping, `alarm_enter_deep_sleep` is called.
The port should set any alarms it didn't during prepare based on
data it saved internally during prepare.

ESP32-S2 sleep is a bit reorganized to locate more logic with
TimeAlarm. This will help it scale to more alarm types.

Fixes #3786
2020-12-08 10:52:25 -08:00
Scott Shawcroft 09bc415751
Unify iMX flash config and add Metro M7 1011
This unifies the flash config to the settings used by the Boot ROM.
This makes the config unique per board which allows for changing
quad enable and status bit differences per flash device. It also
allows for timing differences due to the board layout.

This change also tweaks linker layout to leave more ram space for
the CircuitPython heap.
2020-10-07 15:23:47 -07:00
Lucian Copeland fe75c7793c Fix SWO/Analog overlap, style changes 2020-05-29 12:19:37 -04:00
Lucian Copeland 99538c2414 Implement pin claiming, pin reset, and pin protections 2020-05-15 15:16:51 -04:00
Scott Shawcroft 1c39606345
Fix other builds missing new heap bounds functions 2020-01-18 18:06:56 -08:00
Scott Shawcroft 9d5742ebd1
Fix start on power up by providing Reset_Handler ourselves.
On power up the FlexRAM banks are in an unknown config so we can't
rely on the stack until after we configure FlexRAM.
2020-01-18 11:54:01 -08:00
Scott Shawcroft 7d8dac9211
Refine iMX RT memory layout and add three boards
Introduces a way to place CircuitPython code and data into
tightly coupled memory (TCM) which is accessible by the CPU in a
single cycle. It also frees up room in the corresponding cache for
intermittent data. Loading from external flash is slow!

The data cache is also now enabled.

Adds support for the iMX RT 1021 chip. Adds three new boards:
* iMX RT 1020 EVK
* iMX RT 1060 EVK
* Teensy 4.0

Related to #2492, #2472 and #2477. Fixes #2475.
2020-01-17 17:36:08 -08:00
arturo182 13e0cba6f1 Add initial MIMXRT10XX port 2020-01-06 21:08:49 +01:00