Commit Graph

17 Commits

Author SHA1 Message Date
hathach 01c1296197 nrf52 uart io rx work reliably 2018-09-25 12:37:31 +07:00
hathach 1782ceab35 uarte malloc if buffer is not in SRAM 2018-09-24 16:18:49 +07:00
hathach 4015023e01 clean up uart io 2018-09-24 16:12:05 +07:00
hathach 7bbd449f06 uarte rx work fine 2018-09-24 15:54:32 +07:00
hathach fdd3e91753 changing to nrf uarte, tx works fine 2018-09-24 14:56:52 +07:00
hathach 7a1b4ccc9b Merge branch 'master' into nrf52_uart_io 2018-09-24 12:50:48 +07:00
hathach 816ff05253 clean up 2018-09-21 03:53:35 +07:00
hathach dddc437ea7 got rx working finally 2018-09-21 03:48:13 +07:00
hathach fe1a297889 still have issue with initial uart rx 2018-09-21 01:27:52 +07:00
hathach 9c25306877 uart rx got some issue with irq 2018-09-20 02:12:21 +07:00
hathach c5593ec074 got uart tx work 2018-09-19 17:59:15 +07:00
Dan Halbert 56b7f3ba64 fix translate omission; pca10059 fix in .travis.yml 2018-09-18 16:28:27 -04:00
Dan Halbert bc510e714f merge 3.0.2 to master 2018-09-18 15:38:12 -04:00
Dan Halbert 6a72084198 fix nrf builds; sphinx 1.8.0 crashing: use lower version 2018-09-12 18:37:03 -04:00
Dan Halbert 585597a252 pin files rework; implement pin claiming; add more boards 2018-08-31 18:05:55 -04:00
Scott Shawcroft 76e0373576
Fix nrf and unix 2018-08-16 17:41:38 -07:00
Dan Halbert 5f101f3535 Add dummy UART implementation to nrf so it builds with UART turned on. Also add OneWire. 2018-02-21 22:53:17 -05:00