Prior to this fix, enabling WebREPL for the first time via webrepl_setup
did not work at all because "boot.py" did not contain any lines with
"webrepl" in them that could be uncommented.
This time hopefully should work reliably, using make $(wildcard) function,
which in this case either expands to existing prj_$(BOARD).conf file, or to
an empty string for non-existing one.
- Added D4 and moved associated SD_CS so that they are paired within list
- Added D7 and SD_CD which is the SD Card Detect pin
- Added D8 and GREEN_LED
- Added RED_LED associated with D13
- Added Setup information regarding arm complier packages
- README - Updated to reflect that feather_m0_adalogger microSD is supported
- Added D4 and moved associated SD_CS so that they are paired within list
- Added D7 and SD_CD which is the SD Card Detect pin
- Added D8 and GREEN_LED
- Added RED_LED associated with D13
This is a low-cost evaluation kit board from ST based on the STM32
Nucleo-144 form factor. It uses the STM32F746ZG MCU in the LQFP144
package. The MCU has 1MB of flash and 320kB of System RAM.
Cortex-M7 runs at up to 216MHz.
Also, fixed pin mappings for rev B Metro M4:
swap PA12 and PA13 on SPI 2x3 header
swap A3 and A5
Comment out all frozen modules in CPX again to make room while waiting
for SPI flash.
This patch simplifies the str creation API to favour the common case of
creating a str object that is not forced to be interned. To force
interning of a new str the new mp_obj_new_str_via_qstr function is added,
and should only be used if warranted.
Apart from simplifying the mp_obj_new_str function (and making it have the
same signature as mp_obj_new_bytes), this patch also reduces code size by a
bit (-16 bytes for bare-arm and roughly -40 bytes on the bare-metal archs).
Recent vendor SDKs ship libs with code in .text section, which previously
was going into .irom0.text. Adjust the linker script to route these
sections back to iROM (follows upstream change).
The SHA1 hashing functionality is provided via the "axtls" library's
implementation, and hence is unavailable when the "axtls" library is not being
used. This change provides the same SHA1 hashing functionality when using the
"mbedtls" library by using its implementation instead.
* Be more liberal with critical sections to ensure ordering.
* Correct usb_busy so that it is busy when no errors occur on
transfer. I believe it worked before because it would be false
momentarily until a second transfer was attempted and a busy
error was returned, therefore setting usb_busy to true. That
risks the first "failed" transfer completing before a second one
is attempted.
Macros to convert big-endian values to host byte order and vice-versa.
These were defined in adhoc way for some ports (e.g. esp8266), allow
reuse, provide default implementations, while allow ports to override.
* Added asf4_conf/samd*/hpl_sercom_config.h
* Adjusted clocks in peripheral_clk_config.h.
* Put some frozen libs back in CPX for testing.
* Implement common-hal I2C
* Add samd*_peripherals.h in parallel with samd*_pins.h for common
functions and data.
* Store SERCOM index in pins table for convenience.
* Canonicalize some #include guard names in various .h files.
simpler reset of SERCOMs; remove unused routine
In the vendor SDK 2.1.0, some of the functions which previously didn't
have prototypes, finally acquired them. Change prototypes on our side
to match those in vendor headers, to avoid warnings-as-errors.
This explicit zero length xfer leads to a second CSW packet. If
another read was started between the two CSWs then the host gets
confused and resets the device.
On reads, the CSW is automatically sent when we reply with the
total length. Writes must do it manually so they can wait for the
disk to flush the data.
