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Merge remote-tracking branch 'upstream/master' into builtins

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This commit is contained in:
John R. Lenton 2014-01-14 23:58:05 +00:00
commit ff8007c7d6
29 changed files with 3004 additions and 98 deletions
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3
README.md
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@ -1,5 +1,8 @@
The Micro Python project
========================
<p align="center">
<img src="https://raw2.github.com/micropython/micropython/master/logo/upython-with-micro.png" alt="MicroPython Logo"/>
</p>
This is the Micro Python project, which aims to put an implementation
of Python 3.x on a microcontroller.

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2
py/builtin.c
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@ -339,7 +339,7 @@ static mp_obj_t mp_builtin_sorted(mp_obj_t args, mp_map_t *kwargs) {
}
mp_obj_t self = list_type.make_new((mp_obj_t)&list_type, 1, args_items);
mp_obj_t new_args = rt_build_tuple(1, &self);
list_sort(new_args, kwargs);
mp_obj_list_sort(new_args, kwargs);
return self;
}

2
py/lexer.c
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@ -614,7 +614,7 @@ mp_lexer_t *mp_lexer_new(const char *src_name, void *stream_data, mp_lexer_strea
lex->num_indent_level = 1;
lex->indent_level = m_new(uint16_t, lex->alloc_indent_level);
lex->indent_level[0] = 0;
vstr_init(&lex->vstr);
vstr_init(&lex->vstr, 32);
// preload characters
lex->chr0 = stream_next_char(stream_data);

6
py/misc.h
View File

@ -59,15 +59,19 @@ typedef struct _vstr_t {
bool had_error;
} vstr_t;
void vstr_init(vstr_t *vstr);
void vstr_init(vstr_t *vstr, int alloc);
void vstr_clear(vstr_t *vstr);
vstr_t *vstr_new(void);
vstr_t *vstr_new_size(int alloc);
void vstr_free(vstr_t *vstr);
void vstr_reset(vstr_t *vstr);
bool vstr_had_error(vstr_t *vstr);
char *vstr_str(vstr_t *vstr);
int vstr_len(vstr_t *vstr);
void vstr_hint_size(vstr_t *vstr, int size);
char *vstr_extend(vstr_t *vstr, int size);
bool vstr_set_size(vstr_t *vstr, int size);
bool vstr_shrink(vstr_t *vstr);
char *vstr_add_len(vstr_t *vstr, int len);
void vstr_add_byte(vstr_t *vstr, byte v);
void vstr_add_char(vstr_t *vstr, unichar chr);

2
py/obj.h
View File

@ -292,7 +292,7 @@ extern const mp_obj_type_t list_type;
mp_obj_t mp_obj_list_append(mp_obj_t self_in, mp_obj_t arg);
void mp_obj_list_get(mp_obj_t self_in, uint *len, mp_obj_t **items);
void mp_obj_list_store(mp_obj_t self_in, mp_obj_t index, mp_obj_t value);
mp_obj_t list_sort(mp_obj_t args, struct _mp_map_t *kwargs);
mp_obj_t mp_obj_list_sort(mp_obj_t args, struct _mp_map_t *kwargs);
// enumerate
extern const mp_obj_type_t enumerate_type;

16
py/objdict.c
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@ -57,6 +57,12 @@ static mp_obj_t dict_binary_op(int op, mp_obj_t lhs_in, mp_obj_t rhs_in) {
return elem->value;
}
}
case RT_COMPARE_OP_IN:
case RT_COMPARE_OP_NOT_IN:
{
mp_map_elem_t *elem = mp_map_lookup(&o->map, rhs_in, MP_MAP_LOOKUP);
return MP_BOOL((op == RT_COMPARE_OP_IN) ^ (elem == NULL));
}
default:
// op not supported
return NULL;
@ -362,10 +368,20 @@ static void dict_view_print(void (*print)(void *env, const char *fmt, ...), void
print(env, "])");
}
static mp_obj_t dict_view_binary_op(int op, mp_obj_t lhs_in, mp_obj_t rhs_in) {
/* only supported for the 'keys' kind until sets and dicts are refactored */
mp_obj_dict_view_t *o = lhs_in;
if (o->kind != MP_DICT_VIEW_KEYS) return NULL;
if (op != RT_COMPARE_OP_IN && op != RT_COMPARE_OP_NOT_IN) return NULL;
return dict_binary_op(op, o->dict, rhs_in);
}
static const mp_obj_type_t dict_view_type = {
{ &mp_const_type },
"dict_view",
.print = dict_view_print,
.binary_op = dict_view_binary_op,
.getiter = dict_view_getiter,
};

111
py/objexcept.c
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@ -8,105 +8,86 @@
#include "misc.h"
#include "mpconfig.h"
#include "obj.h"
#include "objtuple.h"
// This is unified class for C-level and Python-level exceptions
// Python-level exception have empty ->msg and all arguments are in
// args tuple. C-level excepttion likely have ->msg, and may as well
// have args tuple (or otherwise have it as NULL).
typedef struct mp_obj_exception_t {
mp_obj_base_t base;
qstr id;
int n_args;
const void *args[];
qstr msg;
mp_obj_tuple_t args;
} mp_obj_exception_t;
void exception_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t o_in) {
mp_obj_exception_t *o = o_in;
switch (o->n_args) {
case 0:
print(env, "%s", qstr_str(o->id));
break;
case 1:
print(env, "%s: %s", qstr_str(o->id), (const char*)o->args[0]);
break;
case 2:
print(env, "%s: ", qstr_str(o->id));
print(env, (const char*)o->args[0], o->args[1]);
break;
default: // here we just assume at least 3 args, but only use first 3
print(env, "%s: ", qstr_str(o->id));
print(env, (const char*)o->args[0], o->args[1], o->args[2]);
break;
if (o->msg != 0) {
print(env, "%s: %s", qstr_str(o->id), qstr_str(o->msg));
} else {
print(env, "%s", qstr_str(o->id));
tuple_print(print, env, &o->args);
}
}
// args in reversed order
static mp_obj_t exception_call(mp_obj_t self_in, int n_args, const mp_obj_t *args) {
mp_obj_exception_t *base = self_in;
mp_obj_exception_t *o = m_new_obj_var(mp_obj_exception_t, mp_obj_t*, n_args);
o->base.type = &exception_type;
o->id = base->id;
o->msg = 0;
o->args.len = n_args;
// TODO: factor out as reusable copy_reversed()
int j = 0;
for (int i = n_args - 1; i >= 0; i--) {
o->args.items[i] = args[j++];
}
return o;
}
const mp_obj_type_t exception_type = {
{ &mp_const_type },
"exception",
.print = exception_print,
.call_n = exception_call,
};
mp_obj_t mp_obj_new_exception(qstr id) {
mp_obj_exception_t *o = m_new_obj(mp_obj_exception_t);
o->base.type = &exception_type;
o->id = id;
o->n_args = 0;
return o;
return mp_obj_new_exception_msg_varg(id, NULL);
}
mp_obj_t mp_obj_new_exception_msg(qstr id, const char *msg) {
mp_obj_exception_t *o = m_new_obj_var(mp_obj_exception_t, void*, 1);
o->base.type = &exception_type;
o->id = id;
o->n_args = 1;
o->args[0] = msg;
return o;
return mp_obj_new_exception_msg_varg(id, msg);
}
mp_obj_t mp_obj_new_exception_msg_1_arg(qstr id, const char *fmt, const char *a1) {
mp_obj_exception_t *o = m_new_obj_var(mp_obj_exception_t, void*, 2);
o->base.type = &exception_type;
o->id = id;
o->n_args = 2;
o->args[0] = fmt;
o->args[1] = a1;
return o;
return mp_obj_new_exception_msg_varg(id, fmt, a1);
}
mp_obj_t mp_obj_new_exception_msg_2_args(qstr id, const char *fmt, const char *a1, const char *a2) {
mp_obj_exception_t *o = m_new_obj_var(mp_obj_exception_t, void*, 3);
o->base.type = &exception_type;
o->id = id;
o->n_args = 3;
o->args[0] = fmt;
o->args[1] = a1;
o->args[2] = a2;
return o;
return mp_obj_new_exception_msg_varg(id, fmt, a1, a2);
}
mp_obj_t mp_obj_new_exception_msg_varg(qstr id, const char *fmt, ...) {
// count number of arguments by number of % signs, excluding %%
int n_args = 1; // count fmt
for (const char *s = fmt; *s; s++) {
if (*s == '%') {
if (s[1] == '%') {
s += 1;
} else {
n_args += 1;
}
}
}
// make exception object
mp_obj_exception_t *o = m_new_obj_var(mp_obj_exception_t, void*, n_args);
mp_obj_exception_t *o = m_new_obj_var(mp_obj_exception_t, mp_obj_t*, 0);
o->base.type = &exception_type;
o->id = id;
o->n_args = n_args;
o->args[0] = fmt;
// extract args and store them
va_list ap;
va_start(ap, fmt);
for (int i = 1; i < n_args; i++) {
o->args[i] = va_arg(ap, void*);
o->args.len = 0;
if (fmt == NULL) {
o->msg = 0;
} else {
// render exception message
vstr_t *vstr = vstr_new();
va_list ap;
va_start(ap, fmt);
vstr_vprintf(vstr, fmt, ap);
va_end(ap);
o->msg = qstr_from_str_take(vstr->buf, vstr->alloc);
}
va_end(ap);
return o;
}

4
py/objlist.c
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@ -248,7 +248,7 @@ static void mp_quicksort(mp_obj_t *head, mp_obj_t *tail, mp_obj_t key_fn, bool r
}
}
mp_obj_t list_sort(mp_obj_t args, mp_map_t *kwargs) {
mp_obj_t mp_obj_list_sort(mp_obj_t args, mp_map_t *kwargs) {
mp_obj_t *args_items = NULL;
uint args_len = 0;
@ -381,7 +381,7 @@ static MP_DEFINE_CONST_FUN_OBJ_3(list_insert_obj, list_insert);
static MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(list_pop_obj, 1, 2, list_pop);
static MP_DEFINE_CONST_FUN_OBJ_2(list_remove_obj, list_remove);
static MP_DEFINE_CONST_FUN_OBJ_1(list_reverse_obj, list_reverse);
static MP_DEFINE_CONST_FUN_OBJ_KW(list_sort_obj, 0, list_sort);
static MP_DEFINE_CONST_FUN_OBJ_KW(list_sort_obj, 0, mp_obj_list_sort);
static const mp_method_t list_type_methods[] = {
{ "append", &list_append_obj },

8
py/objset.c
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@ -45,6 +45,7 @@ void set_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj
print(env, "}");
}
static mp_obj_t set_make_new(mp_obj_t type_in, int n_args, const mp_obj_t *args) {
switch (n_args) {
case 0:
@ -405,6 +406,13 @@ static mp_obj_t set_binary_op(int op, mp_obj_t lhs, mp_obj_t rhs) {
return set_issuperset(lhs, rhs);
case RT_COMPARE_OP_NOT_EQUAL:
return MP_BOOL(set_equal(lhs, rhs) == mp_const_false);
case RT_COMPARE_OP_IN:
case RT_COMPARE_OP_NOT_IN:
{
mp_obj_set_t *o = lhs;
mp_obj_t elem = mp_set_lookup(&o->set, rhs, MP_MAP_LOOKUP);
return MP_BOOL((op == RT_COMPARE_OP_IN) ^ (elem == NULL));
}
default:
// op not supported
return NULL;

9
py/objstr.c
View File

@ -85,6 +85,15 @@ mp_obj_t str_binary_op(int op, mp_obj_t lhs_in, mp_obj_t rhs_in) {
return mp_obj_new_str(qstr_from_str_take(val, alloc_len));
}
break;
case RT_COMPARE_OP_IN:
case RT_COMPARE_OP_NOT_IN:
/* NOTE `a in b` is `b.__contains__(a)` */
if (MP_OBJ_IS_TYPE(rhs_in, &str_type)) {
const char *rhs_str = qstr_str(((mp_obj_str_t*)rhs_in)->qstr);
/* FIXME \0 in strs */
return MP_BOOL((op == RT_COMPARE_OP_IN) ^ (strstr(lhs_str, rhs_str) == NULL));
}
break;
}
return MP_OBJ_NULL; // op not supported

24
py/objzip.c
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@ -12,12 +12,6 @@ typedef struct _mp_obj_zip_t {
mp_obj_t iters[];
} mp_obj_zip_t;
static mp_obj_t zip_getiter(mp_obj_t self_in) {
return self_in;
}
static mp_obj_t zip_iternext(mp_obj_t self_in);
static mp_obj_t zip_make_new(mp_obj_t type_in, int n_args, const mp_obj_t *args) {
/* NOTE: args are backwards */
mp_obj_zip_t *o = m_new_obj_var(mp_obj_zip_t, mp_obj_t, n_args);
@ -29,13 +23,9 @@ static mp_obj_t zip_make_new(mp_obj_t type_in, int n_args, const mp_obj_t *args)
return o;
}
const mp_obj_type_t zip_type = {
{ &mp_const_type },
"zip",
.make_new = zip_make_new,
.iternext = zip_iternext,
.getiter = zip_getiter,
};
static mp_obj_t zip_getiter(mp_obj_t self_in) {
return self_in;
}
static mp_obj_t zip_iternext(mp_obj_t self_in) {
assert(MP_OBJ_IS_TYPE(self_in, &zip_type));
@ -57,3 +47,11 @@ static mp_obj_t zip_iternext(mp_obj_t self_in) {
}
return o;
}
const mp_obj_type_t zip_type = {
{ &mp_const_type },
"zip",
.make_new = zip_make_new,
.getiter = zip_getiter,
.iternext = zip_iternext,
};

47
py/runtime.c
View File

@ -569,22 +569,57 @@ mp_obj_t rt_binary_op(int op, mp_obj_t lhs, mp_obj_t rhs) {
} else if (MP_OBJ_IS_TYPE(rhs, &complex_type)) {
return mp_obj_complex_binary_op(op, lhs_val, 0, rhs);
}
} else {
if (MP_OBJ_IS_OBJ(lhs)) {
mp_obj_base_t *o = lhs;
}
/* deal with `in` and `not in`
*
* NOTE `a in b` is `b.__contains__(a)`, hence why the generic dispatch
* needs to go below
*/
if (op == RT_COMPARE_OP_IN || op == RT_COMPARE_OP_NOT_IN) {
if (!MP_OBJ_IS_SMALL_INT(rhs)) {
mp_obj_base_t *o = rhs;
if (o->type->binary_op != NULL) {
mp_obj_t result = o->type->binary_op(op, lhs, rhs);
if (result != NULL) {
return result;
mp_obj_t res = o->type->binary_op(op, rhs, lhs);
if (res != NULL) {
return res;
}
}
if (o->type->getiter != NULL) {
/* second attempt, walk the iterator */
mp_obj_t next = NULL;
mp_obj_t iter = rt_getiter(rhs);
while ((next = rt_iternext(iter)) != mp_const_stop_iteration) {
if (mp_obj_equal(next, lhs)) {
return MP_BOOL(op == RT_COMPARE_OP_IN);
}
}
return MP_BOOL(op != RT_COMPARE_OP_IN);
}
}
nlr_jump(mp_obj_new_exception_msg_varg(
MP_QSTR_TypeError, "'%s' object is not iterable",
mp_obj_get_type_str(rhs)));
return mp_const_none;
}
if (MP_OBJ_IS_OBJ(lhs)) {
mp_obj_base_t *o = lhs;
if (o->type->binary_op != NULL) {
mp_obj_t result = o->type->binary_op(op, lhs, rhs);
if (result != NULL) {
return result;
}
}
// TODO implement dispatch for reverse binary ops
}
// TODO specify in error message what the operator is
nlr_jump(mp_obj_new_exception_msg_varg(MP_QSTR_TypeError,
"unsupported operand types for binary operator: '%s', '%s'",
mp_obj_get_type_str(lhs), mp_obj_get_type_str(rhs)));
return mp_const_none;
}
mp_obj_t rt_make_function_from_id(int unique_code_id) {

42
py/stream.c
View File

@ -51,5 +51,47 @@ static mp_obj_t stream_write(mp_obj_t self_in, mp_obj_t arg) {
}
}
// TODO: should be in mpconfig.h
#define READ_SIZE 256
static mp_obj_t stream_readall(mp_obj_t self_in) {
struct _mp_obj_base_t *o = (struct _mp_obj_base_t *)self_in;
if (o->type->stream_p.read == NULL) {
// CPython: io.UnsupportedOperation, OSError subclass
nlr_jump(mp_obj_new_exception_msg(MP_QSTR_OSError, "Operation not supported"));
}
int total_size = 0;
vstr_t *vstr = vstr_new_size(READ_SIZE);
char *buf = vstr_str(vstr);
char *p = buf;
int error;
int current_read = READ_SIZE;
while (true) {
machine_int_t out_sz = o->type->stream_p.read(self_in, p, current_read, &error);
if (out_sz == -1) {
nlr_jump(mp_obj_new_exception_msg_varg(MP_QSTR_OSError, "[Errno %d]", error));
}
if (out_sz == 0) {
break;
}
total_size += out_sz;
if (out_sz < current_read) {
current_read -= out_sz;
p += out_sz;
} else {
current_read = READ_SIZE;
p = vstr_extend(vstr, current_read);
if (p == NULL) {
// TODO
nlr_jump(mp_obj_new_exception_msg_varg(MP_QSTR_OSError/*MP_QSTR_RuntimeError*/, "Out of memory"));
}
}
}
vstr_set_size(vstr, total_size + 1); // TODO: for \0
buf[total_size] = 0;
return mp_obj_new_str(qstr_from_str_take(buf, total_size + 1));
}
MP_DEFINE_CONST_FUN_OBJ_2(mp_stream_read_obj, stream_read);
MP_DEFINE_CONST_FUN_OBJ_1(mp_stream_readall_obj, stream_readall);
MP_DEFINE_CONST_FUN_OBJ_2(mp_stream_write_obj, stream_write);

1
py/stream.h
View File

@ -1,2 +1,3 @@
extern const mp_obj_fun_native_t mp_stream_read_obj;
extern const mp_obj_fun_native_t mp_stream_readall_obj;
extern const mp_obj_fun_native_t mp_stream_write_obj;

45
py/vstr.c
View File

@ -6,8 +6,8 @@
// returned value is always at least 1 greater than argument
#define ROUND_ALLOC(a) (((a) & ((~0) - 7)) + 8)
void vstr_init(vstr_t *vstr) {
vstr->alloc = 32;
void vstr_init(vstr_t *vstr, int alloc) {
vstr->alloc = alloc;
vstr->len = 0;
vstr->buf = m_new(char, vstr->alloc);
if (vstr->buf == NULL) {
@ -28,7 +28,16 @@ vstr_t *vstr_new(void) {
if (vstr == NULL) {
return NULL;
}
vstr_init(vstr);
vstr_init(vstr, 32);
return vstr;
}
vstr_t *vstr_new_size(int alloc) {
vstr_t *vstr = m_new(vstr_t, 1);
if (vstr == NULL) {
return NULL;
}
vstr_init(vstr, alloc);
return vstr;
}
@ -63,6 +72,36 @@ int vstr_len(vstr_t *vstr) {
return vstr->len;
}
// Extend vstr strictly to by requested size, return pointer to newly added chunk
char *vstr_extend(vstr_t *vstr, int size) {
char *new_buf = m_renew(char, vstr->buf, vstr->alloc, vstr->alloc + size);
if (new_buf == NULL) {
vstr->had_error = true;
return NULL;
}
char *p = new_buf + vstr->alloc;
vstr->alloc += size;
vstr->buf = new_buf;
return p;
}
// Shrink vstr to be given size
bool vstr_set_size(vstr_t *vstr, int size) {
char *new_buf = m_renew(char, vstr->buf, vstr->alloc, size);
if (new_buf == NULL) {
vstr->had_error = true;
return false;
}
vstr->buf = new_buf;
vstr->alloc = vstr->len = size;
return true;
}
// Shrink vstr allocation to its actual length
bool vstr_shrink(vstr_t *vstr) {
return vstr_set_size(vstr, vstr->len);
}
bool vstr_ensure_extra(vstr_t *vstr, int size) {
if (vstr->len + size + 1 > vstr->alloc) {
int new_alloc = ROUND_ALLOC((vstr->len + size + 1) * 2);

5
stm/Makefile
View File

@ -33,6 +33,7 @@ CFLAGS += -Os -DNDEBUG
endif
LDFLAGS = --nostdlib -T stm32f405.ld
LIBS = $(shell $(CC) -print-libgcc-file-name)
SRC_C = \
main.c \
@ -57,6 +58,7 @@ SRC_C = \
pybwlan.c \
i2c.c \
usrsw.c \
adc.c \
SRC_S = \
startup_stm32f40xx.s \
@ -100,6 +102,7 @@ SRC_STM = \
usbd_storage_msd.c \
stm324x7i_eval.c \
stm324x7i_eval_sdio_sd.c \
stm32f4xx_adc.c \
#SRC_STM_OTG = \
# usb_hcd.c \
@ -143,7 +146,7 @@ $(BUILD)/flash1.bin: $(BUILD)/flash.elf
$(BUILD)/flash.elf: $(OBJ)
$(ECHO) "LINK $@"
$(Q)$(LD) $(LDFLAGS) -o $@ $(OBJ)
$(Q)$(LD) $(LDFLAGS) -o $@ $(OBJ) $(LIBS)
$(Q)$(SIZE) $@
$(BUILD)/%.o: %.s

304
stm/adc.c Normal file
View File

@ -0,0 +1,304 @@
#include <stdio.h>
#include <stm32f4xx_rcc.h>
#include <stm32f4xx_gpio.h>
#include <stm32f4xx_adc.h>
#include "misc.h"
#include "mpconfig.h"
#include "obj.h"
#include "adc.h"
/* ADC defintions */
#define ADCx (ADC1)
#define ADCx_CLK (RCC_APB2Periph_ADC1)
#define ADC_NUM_CHANNELS (16)
/* Internally connected ADC channels Temp/VBAT/VREF*/
#if defined (STM32F40XX) || defined(STM32F41XX)
#define ADC_TEMP_CHANNEL (16)
#define ADC_VBAT_CHANNEL (18)
#define ADC_VREF_CHANNEL (17)
#elif defined (STM32F42XX) || defined(STM32F43XX)
#define ADC_TEMP_CHANNEL (18)
#define ADC_VBAT_CHANNEL (18) /* same channel as TEMP */
#define ADC_VREF_CHANNEL (17)
#endif
/* Core temperature sensor definitions */
#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resoultion) */
#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resoultion) */
/* VBAT divider */
#if defined (STM32F40XX) || defined(STM32F41XX)
#define VBAT_DIV (2)
#elif defined (STM32F42XX) || defined(STM32F43XX)
#define VBAT_DIV (4)
#endif
/* GPIO struct */
typedef struct {
GPIO_TypeDef* port;
uint32_t pin;
} gpio_t;
/* ADC GPIOs */
static gpio_t adc_gpio[] = {
{GPIOA, GPIO_Pin_0}, /* ADC123_IN0 */
{GPIOA, GPIO_Pin_1}, /* ADC123_IN1 */
{GPIOA, GPIO_Pin_2}, /* ADC123_IN2 */
{GPIOA, GPIO_Pin_3}, /* ADC123_IN3 */
{GPIOA, GPIO_Pin_4}, /* ADC12_IN4 */
{GPIOA, GPIO_Pin_5}, /* ADC12_IN5 */
{GPIOA, GPIO_Pin_6}, /* ADC12_IN6 */
{GPIOA, GPIO_Pin_7}, /* ADC12_IN7 */
{GPIOB, GPIO_Pin_0}, /* ADC12_IN8 */
{GPIOB, GPIO_Pin_1}, /* ADC12_IN9 */
{GPIOC, GPIO_Pin_0}, /* ADC123_IN10 */
{GPIOC, GPIO_Pin_1}, /* ADC123_IN11 */
{GPIOC, GPIO_Pin_2}, /* ADC123_IN12 */
{GPIOC, GPIO_Pin_3}, /* ADC123_IN13 */
{GPIOC, GPIO_Pin_4}, /* ADC12_IN14 */
{GPIOC, GPIO_Pin_5}, /* ADC12_IN15 */
};
void adc_init(uint32_t resolution) {
ADC_InitTypeDef ADC_InitStructure;
GPIO_InitTypeDef GPIO_InitStructure;
ADC_CommonInitTypeDef ADC_CommonInitStructure;
/* Enable ADCx, DMA and GPIO clocks */
#if 0
/* GPIO clocks enabled in main */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA |
RCC_AHB1Periph_GPIOB |
RCC_AHB1Periph_GPIOC, ENABLE);
#endif
RCC_APB2PeriphClockCmd(ADCx_CLK, ENABLE);
/* ADC Common Init */
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInit(&ADC_CommonInitStructure);
/* Configure ADC GPIOs */
for (int i=0; i<ADC_NUM_CHANNELS; i++) {
GPIO_InitStructure.GPIO_Pin = adc_gpio[i].pin;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(adc_gpio[i].port, &GPIO_InitStructure);
}
/* ADCx Init */
// ADC_DeInit();
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = 1;
ADC_Init(ADCx, &ADC_InitStructure);
/* Enable ADCx */
ADC_Cmd(ADCx, ENABLE);
/* Enable VBAT/VREF monitor */
ADC_VBATCmd(ENABLE);
/* Enable temperature sensor */
ADC_TempSensorVrefintCmd(ENABLE);
}
uint32_t adc_read_channel(int channel)
{
int timeout = 10000;
if (channel > (ADC_NUM_CHANNELS-1)) {
return 0;
}
/* ADC regular channel config ADC/Channel/SEQ Rank/Sample time */
ADC_RegularChannelConfig(ADCx, channel, 1, ADC_SampleTime_15Cycles);
/* Start ADC single conversion */
ADC_SoftwareStartConv(ADCx);
/* Wait for conversion to be complete*/
while(!ADC_GetFlagStatus(ADCx, ADC_FLAG_EOC) && --timeout >0) {
}
/* ADC conversion timed out */
if (timeout == 0) {
return 0;
}
/* Return converted data */
return ADC_GetConversionValue(ADCx);
}
int adc_read_core_temp()
{
int timeout = 10000;
/* ADC temperature sensor channel config ADC/Channel/SEQ Rank/Sample time */
/* Note: sample time must be higher than minimum sample time */
ADC_RegularChannelConfig(ADCx, ADC_TEMP_CHANNEL, 1, ADC_SampleTime_480Cycles);
/* Start ADC single conversion */
ADC_SoftwareStartConv(ADCx);
/* Wait for conversion to be complete*/
while(!ADC_GetFlagStatus(ADCx, ADC_FLAG_EOC) && --timeout >0) {
}
/* ADC conversion timed out */
if (timeout == 0) {
return 0;
}
/* Convert ADC reading to temperature */
/* Temperature formula from datasheet P.411 */
return ((ADC_GetConversionValue(ADCx) - CORE_TEMP_V25) / CORE_TEMP_AVG_SLOPE) + 25;
}
float adc_read_core_vbat()
{
int timeout = 10000;
/* ADC VBAT channel config ADC/Channel/SEQ Rank/Sample time */
/* Note: sample time must be higher than minimum sample time */
ADC_RegularChannelConfig(ADCx, ADC_VBAT_CHANNEL, 1, ADC_SampleTime_144Cycles);
/* Start ADC single conversion */
ADC_SoftwareStartConv(ADCx);
/* Wait for conversion to be complete */
while(!ADC_GetFlagStatus(ADCx, ADC_FLAG_EOC) && --timeout >0) {
}
/* ADC conversion timed out */
if (timeout == 0) {
return 0;
}
/* Convert ADC reading to voltage, VBAT pin is
internally connected to a bridge divider by VBAT_DIV */
return ADC_GetConversionValue(ADCx)*VBAT_DIV/4096.0f*3.3f;
}
float adc_read_core_vref()
{
int timeout = 10000;
/* ADC VBAT channel config ADC/Channel/SEQ Rank/Sample time */
/* Note: sample time must be higher than minimum sample time */
ADC_RegularChannelConfig(ADCx, ADC_VREF_CHANNEL, 1, ADC_SampleTime_112Cycles);
/* Start ADC single conversion */
ADC_SoftwareStartConv(ADCx);
/* Wait for conversion to be complete*/
while(!ADC_GetFlagStatus(ADCx, ADC_FLAG_EOC) && --timeout >0) {
}
/* ADC conversion timed out */
if (timeout == 0) {
return 0;
}
/* Convert ADC reading to voltage */
return ADC_GetConversionValue(ADCx)/4096.0f*3.3f;
}
/******************************************************************************/
/* Micro Python bindings */
typedef struct _pyb_adc_obj_t {
mp_obj_base_t base;
int adc_id;
bool is_enabled;
} pyb_adc_obj_t;
static mp_obj_t adc_obj_read_channel(mp_obj_t self_in, mp_obj_t channel) {
mp_obj_t ret = mp_const_none;
pyb_adc_obj_t *self = self_in;
if (self->is_enabled) {
uint32_t chan = mp_obj_get_int(channel);
uint32_t data = adc_read_channel(chan);
ret = mp_obj_new_int(data);
}
return ret;
}
static mp_obj_t adc_obj_read_core_temp(mp_obj_t self_in) {
mp_obj_t ret = mp_const_none;
pyb_adc_obj_t *self = self_in;
if (self->is_enabled) {
int data = adc_read_core_temp();
ret = mp_obj_new_int(data);
}
return ret;
}
static mp_obj_t adc_obj_read_core_vbat(mp_obj_t self_in) {
mp_obj_t ret = mp_const_none;
pyb_adc_obj_t *self = self_in;
if (self->is_enabled) {
float data = adc_read_core_vbat();
ret = mp_obj_new_float(data);
}
return ret;
}
static mp_obj_t adc_obj_read_core_vref(mp_obj_t self_in) {
mp_obj_t ret = mp_const_none;
pyb_adc_obj_t *self = self_in;
if (self->is_enabled) {
float data = adc_read_core_vref();
ret = mp_obj_new_float(data);
}
return ret;
}
static void adc_obj_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in) {
pyb_adc_obj_t *self = self_in;
print(env, "<ADC %lu>", self->adc_id);
}
static MP_DEFINE_CONST_FUN_OBJ_2(adc_obj_read_channel_obj, adc_obj_read_channel);
static MP_DEFINE_CONST_FUN_OBJ_1(adc_obj_read_core_temp_obj, adc_obj_read_core_temp);
static MP_DEFINE_CONST_FUN_OBJ_1(adc_obj_read_core_vbat_obj, adc_obj_read_core_vbat);
static MP_DEFINE_CONST_FUN_OBJ_1(adc_obj_read_core_vref_obj, adc_obj_read_core_vref);
static const mp_method_t adc_methods[] = {
{ "read_channel", &adc_obj_read_channel_obj},
{ "read_core_temp", &adc_obj_read_core_temp_obj},
{ "read_core_vbat", &adc_obj_read_core_vbat_obj},
{ "read_core_vref", &adc_obj_read_core_vref_obj},
{ NULL, NULL },
};
static const mp_obj_type_t adc_obj_type = {
{ &mp_const_type },
"ADC",
.print = adc_obj_print,
.methods = adc_methods,
};
mp_obj_t pyb_ADC(mp_obj_t resolution) {
/* init ADC */
adc_init(mp_obj_get_int(resolution));
pyb_adc_obj_t *o = m_new_obj(pyb_adc_obj_t);
o->base.type = &adc_obj_type;
o->adc_id = 1;
o->is_enabled = true;
return o;
}

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mp_obj_t pyb_ADC(mp_obj_t resolution);

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/**
******************************************************************************
* @file stm32f4xx_adc.h
* @author MCD Application Team
* @version V1.3.0
* @date 08-November-2013
* @brief This file contains all the functions prototypes for the ADC firmware
* library.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4xx_ADC_H
#define __STM32F4xx_ADC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx.h"
/** @addtogroup STM32F4xx_StdPeriph_Driver
* @{
*/
/** @addtogroup ADC
* @{
*/
/* Exported types ------------------------------------------------------------*/
/**
* @brief ADC Init structure definition
*/
typedef struct
{
uint32_t ADC_Resolution; /*!< Configures the ADC resolution dual mode.
This parameter can be a value of @ref ADC_resolution */
FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion
is performed in Scan (multichannels)
or Single (one channel) mode.
This parameter can be set to ENABLE or DISABLE */
FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion
is performed in Continuous or Single mode.
This parameter can be set to ENABLE or DISABLE. */
uint32_t ADC_ExternalTrigConvEdge; /*!< Select the external trigger edge and
enable the trigger of a regular group.
This parameter can be a value of
@ref ADC_external_trigger_edge_for_regular_channels_conversion */
uint32_t ADC_ExternalTrigConv; /*!< Select the external event used to trigger
the start of conversion of a regular group.
This parameter can be a value of
@ref ADC_extrenal_trigger_sources_for_regular_channels_conversion */
uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment
is left or right. This parameter can be
a value of @ref ADC_data_align */
uint8_t ADC_NbrOfConversion; /*!< Specifies the number of ADC conversions
that will be done using the sequencer for
regular channel group.
This parameter must range from 1 to 16. */
}ADC_InitTypeDef;
/**
* @brief ADC Common Init structure definition
*/
typedef struct
{
uint32_t ADC_Mode; /*!< Configures the ADC to operate in
independent or multi mode.
This parameter can be a value of @ref ADC_Common_mode */
uint32_t ADC_Prescaler; /*!< Select the frequency of the clock
to the ADC. The clock is common for all the ADCs.
This parameter can be a value of @ref ADC_Prescaler */
uint32_t ADC_DMAAccessMode; /*!< Configures the Direct memory access
mode for multi ADC mode.
This parameter can be a value of
@ref ADC_Direct_memory_access_mode_for_multi_mode */
uint32_t ADC_TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
This parameter can be a value of
@ref ADC_delay_between_2_sampling_phases */
}ADC_CommonInitTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup ADC_Exported_Constants
* @{
*/
#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
((PERIPH) == ADC2) || \
((PERIPH) == ADC3))
/** @defgroup ADC_Common_mode
* @{
*/
#define ADC_Mode_Independent ((uint32_t)0x00000000)
#define ADC_DualMode_RegSimult_InjecSimult ((uint32_t)0x00000001)
#define ADC_DualMode_RegSimult_AlterTrig ((uint32_t)0x00000002)
#define ADC_DualMode_InjecSimult ((uint32_t)0x00000005)
#define ADC_DualMode_RegSimult ((uint32_t)0x00000006)
#define ADC_DualMode_Interl ((uint32_t)0x00000007)
#define ADC_DualMode_AlterTrig ((uint32_t)0x00000009)
#define ADC_TripleMode_RegSimult_InjecSimult ((uint32_t)0x00000011)
#define ADC_TripleMode_RegSimult_AlterTrig ((uint32_t)0x00000012)
#define ADC_TripleMode_InjecSimult ((uint32_t)0x00000015)
#define ADC_TripleMode_RegSimult ((uint32_t)0x00000016)
#define ADC_TripleMode_Interl ((uint32_t)0x00000017)
#define ADC_TripleMode_AlterTrig ((uint32_t)0x00000019)
#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
((MODE) == ADC_DualMode_RegSimult_InjecSimult) || \
((MODE) == ADC_DualMode_RegSimult_AlterTrig) || \
((MODE) == ADC_DualMode_InjecSimult) || \
((MODE) == ADC_DualMode_RegSimult) || \
((MODE) == ADC_DualMode_Interl) || \
((MODE) == ADC_DualMode_AlterTrig) || \
((MODE) == ADC_TripleMode_RegSimult_InjecSimult) || \
((MODE) == ADC_TripleMode_RegSimult_AlterTrig) || \
((MODE) == ADC_TripleMode_InjecSimult) || \
((MODE) == ADC_TripleMode_RegSimult) || \
((MODE) == ADC_TripleMode_Interl) || \
((MODE) == ADC_TripleMode_AlterTrig))
/**
* @}
*/
/** @defgroup ADC_Prescaler
* @{
*/
#define ADC_Prescaler_Div2 ((uint32_t)0x00000000)
#define ADC_Prescaler_Div4 ((uint32_t)0x00010000)
#define ADC_Prescaler_Div6 ((uint32_t)0x00020000)
#define ADC_Prescaler_Div8 ((uint32_t)0x00030000)
#define IS_ADC_PRESCALER(PRESCALER) (((PRESCALER) == ADC_Prescaler_Div2) || \
((PRESCALER) == ADC_Prescaler_Div4) || \
((PRESCALER) == ADC_Prescaler_Div6) || \
((PRESCALER) == ADC_Prescaler_Div8))
/**
* @}
*/
/** @defgroup ADC_Direct_memory_access_mode_for_multi_mode
* @{
*/
#define ADC_DMAAccessMode_Disabled ((uint32_t)0x00000000) /* DMA mode disabled */
#define ADC_DMAAccessMode_1 ((uint32_t)0x00004000) /* DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
#define ADC_DMAAccessMode_2 ((uint32_t)0x00008000) /* DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
#define ADC_DMAAccessMode_3 ((uint32_t)0x0000C000) /* DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
#define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAAccessMode_Disabled) || \
((MODE) == ADC_DMAAccessMode_1) || \
((MODE) == ADC_DMAAccessMode_2) || \
((MODE) == ADC_DMAAccessMode_3))
/**
* @}
*/
/** @defgroup ADC_delay_between_2_sampling_phases
* @{
*/
#define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
#define ADC_TwoSamplingDelay_6Cycles ((uint32_t)0x00000100)
#define ADC_TwoSamplingDelay_7Cycles ((uint32_t)0x00000200)
#define ADC_TwoSamplingDelay_8Cycles ((uint32_t)0x00000300)
#define ADC_TwoSamplingDelay_9Cycles ((uint32_t)0x00000400)
#define ADC_TwoSamplingDelay_10Cycles ((uint32_t)0x00000500)
#define ADC_TwoSamplingDelay_11Cycles ((uint32_t)0x00000600)
#define ADC_TwoSamplingDelay_12Cycles ((uint32_t)0x00000700)
#define ADC_TwoSamplingDelay_13Cycles ((uint32_t)0x00000800)
#define ADC_TwoSamplingDelay_14Cycles ((uint32_t)0x00000900)
#define ADC_TwoSamplingDelay_15Cycles ((uint32_t)0x00000A00)
#define ADC_TwoSamplingDelay_16Cycles ((uint32_t)0x00000B00)
#define ADC_TwoSamplingDelay_17Cycles ((uint32_t)0x00000C00)
#define ADC_TwoSamplingDelay_18Cycles ((uint32_t)0x00000D00)
#define ADC_TwoSamplingDelay_19Cycles ((uint32_t)0x00000E00)
#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
#define IS_ADC_SAMPLING_DELAY(DELAY) (((DELAY) == ADC_TwoSamplingDelay_5Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_6Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_7Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_8Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_9Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_10Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_11Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_12Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_13Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_14Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_15Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_16Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_17Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_18Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_19Cycles) || \
((DELAY) == ADC_TwoSamplingDelay_20Cycles))
/**
* @}
*/
/** @defgroup ADC_resolution
* @{
*/
#define ADC_Resolution_12b ((uint32_t)0x00000000)
#define ADC_Resolution_10b ((uint32_t)0x01000000)
#define ADC_Resolution_8b ((uint32_t)0x02000000)
#define ADC_Resolution_6b ((uint32_t)0x03000000)
#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_Resolution_12b) || \
((RESOLUTION) == ADC_Resolution_10b) || \
((RESOLUTION) == ADC_Resolution_8b) || \
((RESOLUTION) == ADC_Resolution_6b))
/**
* @}
*/
/** @defgroup ADC_external_trigger_edge_for_regular_channels_conversion
* @{
*/
#define ADC_ExternalTrigConvEdge_None ((uint32_t)0x00000000)
#define ADC_ExternalTrigConvEdge_Rising ((uint32_t)0x10000000)
#define ADC_ExternalTrigConvEdge_Falling ((uint32_t)0x20000000)
#define ADC_ExternalTrigConvEdge_RisingFalling ((uint32_t)0x30000000)
#define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
((EDGE) == ADC_ExternalTrigConvEdge_Rising) || \
((EDGE) == ADC_ExternalTrigConvEdge_Falling) || \
((EDGE) == ADC_ExternalTrigConvEdge_RisingFalling))
/**
* @}
*/
/** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion
* @{
*/
#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)
#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x01000000)
#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x02000000)
#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x03000000)
#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x04000000)
#define ADC_ExternalTrigConv_T2_CC4 ((uint32_t)0x05000000)
#define ADC_ExternalTrigConv_T2_TRGO ((uint32_t)0x06000000)
#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x07000000)
#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x08000000)
#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x09000000)
#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x0A000000)
#define ADC_ExternalTrigConv_T5_CC2 ((uint32_t)0x0B000000)
#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x0C000000)
#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x0D000000)
#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x0E000000)
#define ADC_ExternalTrigConv_Ext_IT11 ((uint32_t)0x0F000000)
#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_CC4) || \
((REGTRIG) == ADC_ExternalTrigConv_T2_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T5_CC2) || \
((REGTRIG) == ADC_ExternalTrigConv_T5_CC3) || \
((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11))
/**
* @}
*/
/** @defgroup ADC_data_align
* @{
*/
#define ADC_DataAlign_Right ((uint32_t)0x00000000)
#define ADC_DataAlign_Left ((uint32_t)0x00000800)
#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
((ALIGN) == ADC_DataAlign_Left))
/**
* @}
*/
/** @defgroup ADC_channels
* @{
*/
#define ADC_Channel_0 ((uint8_t)0x00)
#define ADC_Channel_1 ((uint8_t)0x01)
#define ADC_Channel_2 ((uint8_t)0x02)
#define ADC_Channel_3 ((uint8_t)0x03)
#define ADC_Channel_4 ((uint8_t)0x04)
#define ADC_Channel_5 ((uint8_t)0x05)
#define ADC_Channel_6 ((uint8_t)0x06)
#define ADC_Channel_7 ((uint8_t)0x07)
#define ADC_Channel_8 ((uint8_t)0x08)
#define ADC_Channel_9 ((uint8_t)0x09)
#define ADC_Channel_10 ((uint8_t)0x0A)
#define ADC_Channel_11 ((uint8_t)0x0B)
#define ADC_Channel_12 ((uint8_t)0x0C)
#define ADC_Channel_13 ((uint8_t)0x0D)
#define ADC_Channel_14 ((uint8_t)0x0E)
#define ADC_Channel_15 ((uint8_t)0x0F)
#define ADC_Channel_16 ((uint8_t)0x10)
#define ADC_Channel_17 ((uint8_t)0x11)
#define ADC_Channel_18 ((uint8_t)0x12)
#if defined (STM32F40_41xxx)
#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
#endif /* STM32F40_41xxx */
#if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F401xx)
#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_18)
#endif /* STM32F427_437xx || STM32F429_439xx || STM32F401xx */
#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
#define ADC_Channel_Vbat ((uint8_t)ADC_Channel_18)
#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || \
((CHANNEL) == ADC_Channel_1) || \
((CHANNEL) == ADC_Channel_2) || \
((CHANNEL) == ADC_Channel_3) || \
((CHANNEL) == ADC_Channel_4) || \
((CHANNEL) == ADC_Channel_5) || \
((CHANNEL) == ADC_Channel_6) || \
((CHANNEL) == ADC_Channel_7) || \
((CHANNEL) == ADC_Channel_8) || \
((CHANNEL) == ADC_Channel_9) || \
((CHANNEL) == ADC_Channel_10) || \
((CHANNEL) == ADC_Channel_11) || \
((CHANNEL) == ADC_Channel_12) || \
((CHANNEL) == ADC_Channel_13) || \
((CHANNEL) == ADC_Channel_14) || \
((CHANNEL) == ADC_Channel_15) || \
((CHANNEL) == ADC_Channel_16) || \
((CHANNEL) == ADC_Channel_17) || \
((CHANNEL) == ADC_Channel_18))
/**
* @}
*/
/** @defgroup ADC_sampling_times
* @{
*/
#define ADC_SampleTime_3Cycles ((uint8_t)0x00)
#define ADC_SampleTime_15Cycles ((uint8_t)0x01)
#define ADC_SampleTime_28Cycles ((uint8_t)0x02)
#define ADC_SampleTime_56Cycles ((uint8_t)0x03)
#define ADC_SampleTime_84Cycles ((uint8_t)0x04)
#define ADC_SampleTime_112Cycles ((uint8_t)0x05)
#define ADC_SampleTime_144Cycles ((uint8_t)0x06)
#define ADC_SampleTime_480Cycles ((uint8_t)0x07)
#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_3Cycles) || \
((TIME) == ADC_SampleTime_15Cycles) || \
((TIME) == ADC_SampleTime_28Cycles) || \
((TIME) == ADC_SampleTime_56Cycles) || \
((TIME) == ADC_SampleTime_84Cycles) || \
((TIME) == ADC_SampleTime_112Cycles) || \
((TIME) == ADC_SampleTime_144Cycles) || \
((TIME) == ADC_SampleTime_480Cycles))
/**
* @}
*/
/** @defgroup ADC_external_trigger_edge_for_injected_channels_conversion
* @{
*/
#define ADC_ExternalTrigInjecConvEdge_None ((uint32_t)0x00000000)
#define ADC_ExternalTrigInjecConvEdge_Rising ((uint32_t)0x00100000)
#define ADC_ExternalTrigInjecConvEdge_Falling ((uint32_t)0x00200000)
#define ADC_ExternalTrigInjecConvEdge_RisingFalling ((uint32_t)0x00300000)
#define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigInjecConvEdge_None) || \
((EDGE) == ADC_ExternalTrigInjecConvEdge_Rising) || \
((EDGE) == ADC_ExternalTrigInjecConvEdge_Falling) || \
((EDGE) == ADC_ExternalTrigInjecConvEdge_RisingFalling))
/**
* @}
*/
/** @defgroup ADC_extrenal_trigger_sources_for_injected_channels_conversion
* @{
*/
#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00000000)
#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00010000)
#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00020000)
#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00030000)
#define ADC_ExternalTrigInjecConv_T3_CC2 ((uint32_t)0x00040000)
#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00050000)
#define ADC_ExternalTrigInjecConv_T4_CC1 ((uint32_t)0x00060000)
#define ADC_ExternalTrigInjecConv_T4_CC2 ((uint32_t)0x00070000)
#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00080000)
#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00090000)
#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x000A0000)
#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x000B0000)
#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x000C0000)
#define ADC_ExternalTrigInjecConv_T8_CC3 ((uint32_t)0x000D0000)
#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x000E0000)
#define ADC_ExternalTrigInjecConv_Ext_IT15 ((uint32_t)0x000F0000)
#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC2) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC1) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC2) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC3) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15))
/**
* @}
*/
/** @defgroup ADC_injected_channel_selection
* @{
*/
#define ADC_InjectedChannel_1 ((uint8_t)0x14)
#define ADC_InjectedChannel_2 ((uint8_t)0x18)
#define ADC_InjectedChannel_3 ((uint8_t)0x1C)
#define ADC_InjectedChannel_4 ((uint8_t)0x20)
#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
((CHANNEL) == ADC_InjectedChannel_2) || \
((CHANNEL) == ADC_InjectedChannel_3) || \
((CHANNEL) == ADC_InjectedChannel_4))
/**
* @}
*/
/** @defgroup ADC_analog_watchdog_selection
* @{
*/
#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
((WATCHDOG) == ADC_AnalogWatchdog_None))
/**
* @}
*/
/** @defgroup ADC_interrupts_definition
* @{
*/
#define ADC_IT_EOC ((uint16_t)0x0205)
#define ADC_IT_AWD ((uint16_t)0x0106)
#define ADC_IT_JEOC ((uint16_t)0x0407)
#define ADC_IT_OVR ((uint16_t)0x201A)
#define IS_ADC_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
((IT) == ADC_IT_JEOC)|| ((IT) == ADC_IT_OVR))
/**
* @}
*/
/** @defgroup ADC_flags_definition
* @{
*/
#define ADC_FLAG_AWD ((uint8_t)0x01)
#define ADC_FLAG_EOC ((uint8_t)0x02)
#define ADC_FLAG_JEOC ((uint8_t)0x04)
#define ADC_FLAG_JSTRT ((uint8_t)0x08)
#define ADC_FLAG_STRT ((uint8_t)0x10)
#define ADC_FLAG_OVR ((uint8_t)0x20)
#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xC0) == 0x00) && ((FLAG) != 0x00))
#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || \
((FLAG) == ADC_FLAG_EOC) || \
((FLAG) == ADC_FLAG_JEOC) || \
((FLAG)== ADC_FLAG_JSTRT) || \
((FLAG) == ADC_FLAG_STRT) || \
((FLAG)== ADC_FLAG_OVR))
/**
* @}
*/
/** @defgroup ADC_thresholds
* @{
*/
#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
/**
* @}
*/
/** @defgroup ADC_injected_offset
* @{
*/
#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
/**
* @}
*/
/** @defgroup ADC_injected_length
* @{
*/
#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
/**
* @}
*/
/** @defgroup ADC_injected_rank
* @{
*/
#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
/**
* @}
*/
/** @defgroup ADC_regular_length
* @{
*/
#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
/**
* @}
*/
/** @defgroup ADC_regular_rank
* @{
*/
#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
/**
* @}
*/
/** @defgroup ADC_regular_discontinuous_mode_number
* @{
*/
#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/* Function used to set the ADC configuration to the default reset state *****/
void ADC_DeInit(void);
/* Initialization and Configuration functions *********************************/
void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
void ADC_CommonInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
void ADC_CommonStructInit(ADC_CommonInitTypeDef* ADC_CommonInitStruct);
void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
/* Analog Watchdog configuration functions ************************************/
void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,uint16_t LowThreshold);
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
/* Temperature Sensor, Vrefint and VBAT management functions ******************/
void ADC_TempSensorVrefintCmd(FunctionalState NewState);
void ADC_VBATCmd(FunctionalState NewState);
/* Regular Channels Configuration functions ***********************************/
void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
void ADC_SoftwareStartConv(ADC_TypeDef* ADCx);
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
void ADC_EOCOnEachRegularChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
uint32_t ADC_GetMultiModeConversionValue(void);
/* Regular Channels DMA Configuration functions *******************************/
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_DMARequestAfterLastTransferCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_MultiModeDMARequestAfterLastTransferCmd(FunctionalState NewState);
/* Injected channels Configuration functions **********************************/
void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
void ADC_ExternalTrigInjectedConvEdgeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConvEdge);
void ADC_SoftwareStartInjectedConv(ADC_TypeDef* ADCx);
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
/* Interrupts and flags management functions **********************************/
void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
#ifdef __cplusplus
}
#endif
#endif /*__STM32F4xx_ADC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

6
stm/main.c
View File

@ -40,6 +40,7 @@
#include "pybwlan.h"
#include "i2c.h"
#include "usrsw.h"
#include "adc.h"
int errno;
@ -390,7 +391,7 @@ void do_repl(void) {
stdout_tx_str("Type \"help()\" for more information.\r\n");
vstr_t line;
vstr_init(&line);
vstr_init(&line, 32);
for (;;) {
vstr_reset(&line);
@ -839,6 +840,7 @@ soft_reset:
rt_store_attr(m, qstr_from_str_static("I2C"), rt_make_function_n(2, pyb_I2C));
rt_store_attr(m, qstr_from_str_static("gpio"), (mp_obj_t)&pyb_gpio_obj);
rt_store_attr(m, qstr_from_str_static("Usart"), rt_make_function_n(2, pyb_Usart));
rt_store_attr(m, qstr_from_str_static("ADC"), rt_make_function_n(1, pyb_ADC));
rt_store_name(qstr_from_str_static("pyb"), m);
rt_store_name(qstr_from_str_static("open"), rt_make_function_n(2, pyb_io_open));
@ -1178,6 +1180,7 @@ soft_reset:
goto soft_reset;
}
/* now supplied by libgcc library
double __aeabi_f2d(float x) {
// TODO
return 0.0;
@ -1187,6 +1190,7 @@ float __aeabi_d2f(double x) {
// TODO
return 0.0;
}
*/
double sqrt(double x) {
// TODO

12
teensy/Makefile
View File

@ -24,10 +24,20 @@ SIZE = $(COMPILER_PATH)/arm-none-eabi-size
CFLAGS_TEENSY = -DF_CPU=96000000 -DUSB_SERIAL -D__MK20DX256__
CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mcpu=cortex-m4 -fsingle-precision-constant -Wdouble-promotion $(CFLAGS_TEENSY)
CFLAGS = -I. -I$(PY_SRC) -I$(CORE_PATH) -Wall -ansi -std=gnu99 -Os -DNDEBUG $(CFLAGS_CORTEX_M4) -D$(TARGET)
CFLAGS = -I. -I$(PY_SRC) -I$(CORE_PATH) -Wall -ansi -std=gnu99
LDFLAGS = -nostdlib -T mk20dx256.ld
LIBS = -L $(COMPILER_PATH)/../lib/gcc/arm-none-eabi/4.7.2/thumb2 -lgcc
#Debugging/Optimization
ifdef DEBUG
CFLAGS += -Og -ggdb
else
CFLAGS += -Os #-DNDEBUG
endif
# if order is not important for these, move them up
CFLAGS += $(CFLAGS_CORTEX_M4) -D$(TARGET)
SRC_C = \
main.c \
lcd.c \

3
tests/basics/run-tests
View File

@ -42,4 +42,7 @@ echo "$numpassed tests passed"
if [[ $numfailed != 0 ]]
then
echo "$numfailed tests failed -$namefailed"
exit 1
else
exit 0
fi

23
tests/basics/tests/containment.py Normal file
View File

@ -0,0 +1,23 @@
for i in 1, 2:
for o in {1:2}, {1}, {1:2}.keys():
print("{} in {}: {}".format(i, o, i in o))
print("{} not in {}: {}".format(i, o, i not in o))
haystack = "supercalifragilistc"
for needle in (haystack[i:] for i in range(len(haystack))):
print(needle, "in", haystack, "::", needle in haystack)
print(needle, "not in", haystack, "::", needle not in haystack)
print(haystack, "in", needle, "::", haystack in needle)
print(haystack, "not in", needle, "::", haystack not in needle)
for needle in (haystack[:i+1] for i in range(len(haystack))):
print(needle, "in", haystack, "::", needle in haystack)
print(needle, "not in", haystack, "::", needle not in haystack)
print(haystack, "in", needle, "::", haystack in needle)
print(haystack, "not in", needle, "::", haystack not in needle)
# until here, the tests would work without the 'second attempt' iteration thing.
for i in 1, 2:
for o in [], [1], [1, 2]:
print("{} in {}: {}".format(i, o, i in o))
print("{} not in {}: {}".format(i, o, i not in o))

3
tests/basics/tests/exception1.py Normal file
View File

@ -0,0 +1,3 @@
# TODO: requires repr()
#a = IndexError(1, "test", [100, 200])
#print(repr(a))

9
unix-cpy/Makefile
View File

@ -11,9 +11,16 @@ ECHO = @echo
# compiler settings
CC = gcc
CFLAGS = -I. -I$(PY_SRC) -Wall -Werror -ansi -std=gnu99 -Os #-DNDEBUG
CFLAGS = -I. -I$(PY_SRC) -Wall -Werror -ansi -std=gnu99
LDFLAGS = -lm
#Debugging/Optimization
ifdef DEBUG
CFLAGS += -Og -ggdb
else
CFLAGS += -Os #-DNDEBUG
endif
# source files
SRC_C = \
main.c \

11
unix/Makefile
View File

@ -11,9 +11,16 @@ ECHO = @echo
# compiler settings
CC = gcc
CFLAGS = -I. -I$(PY_SRC) -Wall -Werror -ansi -std=gnu99 -Os #-DNDEBUG
CFLAGS = -I. -I$(PY_SRC) -Wall -Werror -ansi -std=gnu99
LDFLAGS = -lm
#Debugging/Optimization
ifdef DEBUG
CFLAGS += -Og -ggdb
else
CFLAGS += -Os #-DNDEBUG
endif
# source files
SRC_C = \
main.c \
@ -27,7 +34,9 @@ LIB = -lreadline
$(PROG): $(BUILD) $(OBJ)
$(ECHO) "LINK $<"
$(Q)$(CC) -o $@ $(OBJ) $(LIB) $(LDFLAGS)
ifndef DEBUG
$(Q)strip $(PROG)
endif
$(Q)size $(PROG)
$(BUILD)/%.o: %.c

1
unix/file.c
View File

@ -90,6 +90,7 @@ static mp_obj_t fdfile_make_new(mp_obj_t type_in, int n_args, const mp_obj_t *ar
static const mp_method_t rawfile_type_methods[] = {
{ "read", &mp_stream_read_obj },
{ "readall", &mp_stream_readall_obj },
{ "write", &mp_stream_write_obj },
{ "close", &fdfile_close_obj },
{ NULL, NULL },