diff --git a/ports/mimxrt10xx/common-hal/busio/SPI.c b/ports/mimxrt10xx/common-hal/busio/SPI.c index cc19ba354c..15c320140a 100644 --- a/ports/mimxrt10xx/common-hal/busio/SPI.c +++ b/ports/mimxrt10xx/common-hal/busio/SPI.c @@ -58,7 +58,7 @@ STATIC void config_periph_pin(const mcu_periph_obj_t *periph) { | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); } -#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv))) +#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1)) void spi_reset(void) { for (int i = 0; i < MAX_SPI; i++) { diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c index 854ae4dee9..61888fcaa7 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/clocks.c @@ -55,7 +55,7 @@ #define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 62500000UL #define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 125000000UL #define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL -#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL +#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 130900000UL #define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL #define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 62500000UL #define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL @@ -137,7 +137,7 @@ void clocks_init(void) { CLOCK_DisableClock(kCLOCK_Lpspi1); CLOCK_DisableClock(kCLOCK_Lpspi2); /* Set LPSPI_PODF. */ - CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); + CLOCK_SetDiv(kCLOCK_LpspiDiv, 2); /* Set Lpspi clock source. */ CLOCK_SetMux(kCLOCK_LpspiMux, 1); /* Disable TRACE clock gate. */