zephyr: Implement machine.Pin.irq() for setting callbacks on pin change.
Supports hard and soft interrupts. In the current implementation, soft interrupt callbacks will only be called when the VM is executing, ie they will not be called during a blocking kernel call like k_msleep. And the behaviour of hard interrupt callbacks will depend on the underlying device, as well as the amount of ISR stack space. Soft and hard interrupts tested on frdm_k64f and nucleo_f767zi boards. Signed-off-by: Damien George <damien@micropython.org>
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@ -52,6 +52,7 @@ SRC_C = main.c \
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uart_core.c \
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zephyr_storage.c \
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lib/timeutils/timeutils.c \
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lib/utils/mpirq.c \
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lib/utils/stdout_helpers.c \
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lib/utils/printf.c \
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lib/utils/pyexec.c \
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@ -35,10 +35,50 @@
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#include "py/runtime.h"
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#include "py/gc.h"
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#include "py/mphal.h"
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#include "lib/utils/mpirq.h"
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#include "modmachine.h"
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#if MICROPY_PY_MACHINE
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typedef struct _machine_pin_irq_obj_t {
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mp_irq_obj_t base;
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struct _machine_pin_irq_obj_t *next;
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struct gpio_callback callback;
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} machine_pin_irq_obj_t;
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STATIC const mp_irq_methods_t machine_pin_irq_methods;
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const mp_obj_base_t machine_pin_obj_template = {&machine_pin_type};
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void machine_pin_deinit(void) {
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for (machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_list); irq != NULL; irq = irq->next) {
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machine_pin_obj_t *pin = MP_OBJ_TO_PTR(irq->base.parent);
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gpio_pin_interrupt_configure(pin->port, pin->pin, GPIO_INT_DISABLE);
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gpio_remove_callback(pin->port, &irq->callback);
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}
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MP_STATE_PORT(machine_pin_irq_list) = NULL;
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}
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STATIC void gpio_callback_handler(struct device *port, struct gpio_callback *cb, gpio_port_pins_t pins) {
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machine_pin_irq_obj_t *irq = CONTAINER_OF(cb, machine_pin_irq_obj_t, callback);
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#if MICROPY_STACK_CHECK
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// This callback executes in an ISR context so the stack-limit check must be changed to
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// use the ISR stack for the duration of this function (so that hard IRQ callbacks work).
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char *orig_stack_top = MP_STATE_THREAD(stack_top);
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size_t orig_stack_limit = MP_STATE_THREAD(stack_limit);
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MP_STATE_THREAD(stack_top) = (void *)&irq;
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MP_STATE_THREAD(stack_limit) = CONFIG_ISR_STACK_SIZE - 512;
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#endif
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mp_irq_handler(&irq->base);
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#if MICROPY_STACK_CHECK
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// Restore original stack-limit checking values.
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MP_STATE_THREAD(stack_top) = orig_stack_top;
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MP_STATE_THREAD(stack_limit) = orig_stack_limit;
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#endif
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}
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STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_pin_obj_t *self = self_in;
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mp_printf(print, "<Pin %p %d>", self->port, self->pin);
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@ -151,6 +191,66 @@ STATIC mp_obj_t machine_pin_on(mp_obj_t self_in) {
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_on_obj, machine_pin_on);
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// pin.irq(handler=None, trigger=IRQ_FALLING|IRQ_RISING, hard=False)
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STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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enum { ARG_handler, ARG_trigger, ARG_hard };
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static const mp_arg_t allowed_args[] = {
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{ MP_QSTR_handler, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
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{ MP_QSTR_trigger, MP_ARG_INT, {.u_int = GPIO_INT_EDGE_BOTH} },
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{ MP_QSTR_hard, MP_ARG_BOOL, {.u_bool = false} },
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};
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(pos_args[0]);
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mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
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mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
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if (self->irq == NULL) {
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machine_pin_irq_obj_t *irq;
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for (irq = MP_STATE_PORT(machine_pin_irq_list); irq != NULL; irq = irq->next) {
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machine_pin_obj_t *irq_pin = MP_OBJ_TO_PTR(irq->base.parent);
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if (irq_pin->port == self->port && irq_pin->pin == self->pin) {
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break;
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}
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}
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if (irq == NULL) {
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irq = m_new_obj(machine_pin_irq_obj_t);
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irq->base.base.type = &mp_irq_type;
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irq->base.methods = (mp_irq_methods_t *)&machine_pin_irq_methods;
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irq->base.parent = MP_OBJ_FROM_PTR(self);
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irq->base.handler = mp_const_none;
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irq->base.ishard = false;
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irq->next = MP_STATE_PORT(machine_pin_irq_list);
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gpio_init_callback(&irq->callback, gpio_callback_handler, BIT(self->pin));
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int ret = gpio_add_callback(self->port, &irq->callback);
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if (ret != 0) {
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mp_raise_OSError(-ret);
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}
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MP_STATE_PORT(machine_pin_irq_list) = irq;
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}
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self->irq = irq;
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}
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if (n_args > 1 || kw_args->used != 0) {
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// configure irq
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int ret = gpio_pin_interrupt_configure(self->port, self->pin, GPIO_INT_DISABLE);
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if (ret != 0) {
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mp_raise_OSError(-ret);
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}
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self->irq->base.handler = args[ARG_handler].u_obj;
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self->irq->base.ishard = args[ARG_hard].u_bool;
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if (args[ARG_handler].u_obj != mp_const_none) {
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ret = gpio_pin_interrupt_configure(self->port, self->pin, args[ARG_trigger].u_int);
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if (ret != 0) {
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mp_raise_OSError(-ret);
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}
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}
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}
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return MP_OBJ_FROM_PTR(self->irq);
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_pin_irq_obj, 1, machine_pin_irq);
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STATIC mp_uint_t machine_pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
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(void)errcode;
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machine_pin_obj_t *self = self_in;
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@ -172,12 +272,15 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) },
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{ MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_off_obj) },
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{ MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_on_obj) },
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{ MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_pin_irq_obj) },
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// class constants
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{ MP_ROM_QSTR(MP_QSTR_IN), MP_ROM_INT(GPIO_INPUT) },
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{ MP_ROM_QSTR(MP_QSTR_OUT), MP_ROM_INT(GPIO_OUTPUT) },
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{ MP_ROM_QSTR(MP_QSTR_PULL_UP), MP_ROM_INT(GPIO_PULL_UP) },
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{ MP_ROM_QSTR(MP_QSTR_PULL_DOWN), MP_ROM_INT(GPIO_PULL_DOWN) },
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{ MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_INT_EDGE_RISING) },
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{ MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_INT_EDGE_FALLING) },
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};
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STATIC MP_DEFINE_CONST_DICT(machine_pin_locals_dict, machine_pin_locals_dict_table);
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@ -195,3 +298,33 @@ const mp_obj_type_t machine_pin_type = {
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.protocol = &machine_pin_pin_p,
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.locals_dict = (mp_obj_t)&machine_pin_locals_dict,
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};
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STATIC mp_uint_t machine_pin_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) {
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
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if (new_trigger == 0) {
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new_trigger = GPIO_INT_DISABLE;
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}
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int ret = gpio_pin_interrupt_configure(self->port, self->pin, new_trigger);
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if (ret != 0) {
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mp_raise_OSError(-ret);
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}
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return 0;
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}
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STATIC mp_uint_t machine_pin_irq_info(mp_obj_t self_in, mp_uint_t info_type) {
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machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in);
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if (info_type == MP_IRQ_INFO_FLAGS) {
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return gpio_get_pending_int(self->port);
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} else if (info_type == MP_IRQ_INFO_TRIGGERS) {
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return 0; // TODO
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}
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return 0;
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}
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STATIC const mp_irq_methods_t machine_pin_irq_methods = {
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.init = machine_pin_irq,
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.trigger = machine_pin_irq_trigger,
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.info = machine_pin_irq_info,
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};
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#endif // MICROPY_PY_MACHINE
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@ -55,6 +55,7 @@
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#include "extmod/vfs.h"
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#endif
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#include "modmachine.h"
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#include "modzephyr.h"
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#ifdef TEST
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@ -166,6 +167,11 @@ soft_reset:
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}
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printf("soft reboot\n");
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#if MICROPY_PY_MACHINE
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machine_pin_deinit();
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#endif
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goto soft_reset;
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return 0;
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@ -11,6 +11,9 @@ typedef struct _machine_pin_obj_t {
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mp_obj_base_t base;
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struct device *port;
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uint32_t pin;
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struct _machine_pin_irq_obj_t *irq;
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} machine_pin_obj_t;
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void machine_pin_deinit(void);
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#endif // MICROPY_INCLUDED_ZEPHYR_MODMACHINE_H
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@ -81,6 +81,7 @@
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#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_LONGLONG)
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#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT)
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#define MICROPY_PY_BUILTINS_COMPLEX (0)
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#define MICROPY_ENABLE_SCHEDULER (1)
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#define MICROPY_VFS (1)
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#define MICROPY_READER_VFS (MICROPY_VFS)
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@ -119,7 +120,8 @@ typedef long mp_off_t;
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#define MP_STATE_PORT MP_STATE_VM
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#define MICROPY_PORT_ROOT_POINTERS \
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const char *readline_hist[8];
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const char *readline_hist[8]; \
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void *machine_pin_irq_list; /* Linked list of pin irq objects */
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extern const struct _mp_obj_module_t mp_module_machine;
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extern const struct _mp_obj_module_t mp_module_time;
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// extra built in names to add to the global namespace
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#define MICROPY_PORT_BUILTINS \
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{ MP_ROM_QSTR(MP_QSTR_open), MP_ROM_PTR(&mp_builtin_open_obj) },
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#define MICROPY_BEGIN_ATOMIC_SECTION irq_lock
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#define MICROPY_END_ATOMIC_SECTION irq_unlock
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