drivers,ports: Fix a few typos in comments.
Fixes: - Should read `definitions` rather than `defintions`. - Should read `resolution` rather than `resoultion`. - Should read `inefficient` rather than `inefficent`. - Should read `closed` rather than `closded`. Signed-off-by: Tim Gates <tim.gates@iress.com>
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@ -604,7 +604,7 @@ INT32 hci_unsol_event_handler(CHAR *event_hdr)
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{
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{
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//data[0] represents the socket id, for which FIN was received by remote.
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//data[0] represents the socket id, for which FIN was received by remote.
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//Upon receiving this event, the user can close the socket, or else the
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//Upon receiving this event, the user can close the socket, or else the
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//socket will be closded after inacvitity timeout (by default 60 seconds)
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//socket will be closed after inacvitity timeout (by default 60 seconds)
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tSLInformation.sWlanCB(event_type, data, 1);
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tSLInformation.sWlanCB(event_type, data, 1);
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}
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}
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}
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}
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@ -18,7 +18,7 @@
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#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
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#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
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/*@}*/
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/*@}*/
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/* FLEXSPI memory config block related defintions */
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/* FLEXSPI memory config block related definitions */
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#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian
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#define FLEXSPI_CFG_BLK_TAG (0x42464346UL) // ascii "FCFB" Big Endian
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#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
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#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
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#define FLEXSPI_CFG_BLK_SIZE (512)
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#define FLEXSPI_CFG_BLK_SIZE (512)
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@ -26,7 +26,7 @@
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/* FLEXSPI Feature related definitions */
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/* FLEXSPI Feature related definitions */
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#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
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#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
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/* Lookup table related defintions */
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/* Lookup table related definitions */
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#define CMD_INDEX_READ 0
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#define CMD_INDEX_READ 0
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#define CMD_INDEX_READSTATUS 1
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#define CMD_INDEX_READSTATUS 1
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#define CMD_INDEX_WRITEENABLE 2
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#define CMD_INDEX_WRITEENABLE 2
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@ -50,7 +50,7 @@
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/// val = adc.read_core_vbat() # read MCU VBAT
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/// val = adc.read_core_vbat() # read MCU VBAT
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/// val = adc.read_core_vref() # read MCU VREF
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/// val = adc.read_core_vref() # read MCU VREF
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/* ADC defintions */
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/* ADC definitions */
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#define ADCx (ADC1)
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#define ADCx (ADC1)
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#define PIN_ADC_MASK PIN_ADC1
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#define PIN_ADC_MASK PIN_ADC1
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#define pin_adc_table pin_adc1
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#define pin_adc_table pin_adc1
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@ -171,8 +171,8 @@
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#define EOC_TIMEOUT (10)
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#define EOC_TIMEOUT (10)
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/* Core temperature sensor definitions */
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/* Core temperature sensor definitions */
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#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resoultion) */
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#define CORE_TEMP_V25 (943) /* (0.76v/3.3v)*(2^ADC resolution) */
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#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resoultion) */
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#define CORE_TEMP_AVG_SLOPE (3) /* (2.5mv/3.3v)*(2^ADC resolution) */
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// scale and calibration values for VBAT and VREF
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// scale and calibration values for VBAT and VREF
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#define ADC_SCALE (ADC_SCALE_V / ((1 << ADC_CAL_BITS) - 1))
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#define ADC_SCALE (ADC_SCALE_V / ((1 << ADC_CAL_BITS) - 1))
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@ -181,7 +181,7 @@ void portb_isr(void)
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void portc_isr(void)
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void portc_isr(void)
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{
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{
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// TODO: these are inefficent. Use CLZ somehow....
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// TODO: these are inefficient. Use CLZ somehow....
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uint32_t isfr = PORTC_ISFR;
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uint32_t isfr = PORTC_ISFR;
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PORTC_ISFR = isfr;
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PORTC_ISFR = isfr;
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if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9]();
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if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9]();
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