Boot linker edits
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@ -1,28 +1,52 @@
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/*
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GNU linker script for STM32F401 with bootloader (such as the Meowbit)
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GNU linker script for STM32F401 with bootloader (from Meowbit Micropython)
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Doesn't work:
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Traceback (most recent call last):
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File "../../tools/build_memory_info.py", line 64, in <module>
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regions[region] = int(eval(space))
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File "<string>", line 1, in <module>
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NameError: name 'FLASH_ISR' is not defined
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*/
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/* Specify the memory areas */
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/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */
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/* sectors 5 128K */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - 64K /* entire flash, sans bootloader */
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FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 64K /* sector 4, 0-3 used by bootloader*/
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FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */
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RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 /* more bootloader schnenaigans */
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */
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FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */
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RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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/* Define tho top end of the stack. The stack is full descending so begins just
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above last byte of RAM. Note that EABI requires the stack to be 8-byte
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aligned for a call. */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* Define the stack. The stack is full descending so begins just above last byte
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of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
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_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
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_sstack = _estack - 16K; /* tunable */
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = _sstack;
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/* Memory layout for internal flash storage configuration:
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FLASH_ISR .isr_vector
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FLASH_TEXT .text
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FLASH_TEXT .data
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RAM .data
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RAM .bss
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RAM .heap
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RAM .stack
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*/
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ENTRY(Reset_Handler)
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@ -36,8 +60,25 @@ SECTIONS
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KEEP(*(.isr_vector)) /* Startup code */
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/* This first flash block is 16K annd the isr vectors only take up
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about 400 bytes. Micropython pads this with files, but this didn't
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work with the size of Circuitpython's ff object. */
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about 400 bytes. So we pull in a couple of object files to pad it
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out. */
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. = ALIGN(4);
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/* NOTE: If you update the list of files contained in .isr_vector,
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then be sure to also update smhal/Makefile where it forcibly
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builds each of these files with -Os */
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*/ff.o(.text*)
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*/vfs_fat_*.o(.text*)
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*/py/formatfloat.o(.text*)
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*/py/parsenum.o(.text*)
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*/py/mpprint.o(.text*)
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*/py/compile.o(.text*)
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*/py/objset.o(.text*)
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*/py/mpz.o(.text*)
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*/py/vm.o(.text*)
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. = ALIGN(4);
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} >FLASH_ISR
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@ -102,5 +143,3 @@ SECTIONS
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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@ -5,10 +5,10 @@
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash, sans bootloader */
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, 0-3 used by bootloader*/
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FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
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FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K
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FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */
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RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194 /* more bootloader schnenaigans */
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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