diff --git a/conf.py b/conf.py index 10bd0d9ce0..43ff72d1a2 100644 --- a/conf.py +++ b/conf.py @@ -154,6 +154,7 @@ exclude_patterns = ["**/build*", ".env", ".venv", ".direnv", + "data", "docs/autoapi", "docs/README.md", "drivers", diff --git a/ports/raspberrypi/Makefile b/ports/raspberrypi/Makefile index bae5ced98b..30648ba8ee 100644 --- a/ports/raspberrypi/Makefile +++ b/ports/raspberrypi/Makefile @@ -233,7 +233,6 @@ SRC_SHARED_MODULE_EXPANDED = $(addprefix shared-bindings/, $(SRC_SHARED_MODULE)) SRC_COMMON_HAL_SHARED_MODULE_EXPANDED = $(sort $(SRC_COMMON_HAL_EXPANDED) $(SRC_SHARED_MODULE_EXPANDED)) SRC_S = supervisor/$(CHIP_FAMILY)_cpu.s -BOOT2_S_UPPER ?= sdk/src/rp2_common/boot_stage2/boot2_generic_03h.S BOOT2_S_CFLAGS ?= -DPICO_FLASH_SPI_CLKDIV=4 SRC_S_UPPER = sdk/src/rp2_common/hardware_divider/divider.S \ sdk/src/rp2_common/hardware_irq/irq_handler_chain.S \ diff --git a/ports/raspberrypi/gen_stage2.py b/ports/raspberrypi/gen_stage2.py index d552bfc88a..87580eb87b 100644 --- a/ports/raspberrypi/gen_stage2.py +++ b/ports/raspberrypi/gen_stage2.py @@ -6,11 +6,11 @@ from jinja2 import Template def main(input_template: pathlib.Path, output_path: pathlib.Path, skus: str = typer.Argument("")): - if ", " in skus: - skus = skus.split(", ") + if "," in skus: + skus = skus.split(",") else: skus = [skus] - skus = ['sku="{}"'.format(f) for f in skus] + skus = ['sku="{}"'.format(f.strip()) for f in skus] flashes = cascadetoml.filter_toml(pathlib.Path("../../data/nvm.toml"), skus) if len(skus) == 0: diff --git a/ports/raspberrypi/stage2.c.jinja b/ports/raspberrypi/stage2.c.jinja index 6cdfc095d1..13de7bff9f 100644 --- a/ports/raspberrypi/stage2.c.jinja +++ b/ports/raspberrypi/stage2.c.jinja @@ -1,6 +1,5 @@ #include "sdk/src/rp2040/hardware_structs/include/hardware/structs/ssi.h" #include "sdk/src/rp2040/hardware_structs/include/hardware/structs/pads_qspi.h" -#include "sdk/src/rp2040/hardware_structs/include/hardware/structs/watchdog.h" #include "sdk/src/rp2040/hardware_regs/include/hardware/regs/addressmap.h" #include "sdk/src/rp2040/hardware_regs/include/hardware/regs/m0plus.h" diff --git a/ports/raspberrypi/supervisor/internal_flash.c b/ports/raspberrypi/supervisor/internal_flash.c index 03ba2af123..51068e184a 100644 --- a/ports/raspberrypi/supervisor/internal_flash.c +++ b/ports/raspberrypi/supervisor/internal_flash.c @@ -69,7 +69,11 @@ void supervisor_flash_init(void) { uint8_t data[4]; flash_do_cmd(cmd, data, 4); uint8_t power_of_two = 21; - if (data[3] >= 20 && data[3] < 30) { + // Flash must be at least 2MB (1 << 21) because we use the first 1MB for the + // CircuitPython core. We validate the range because Adesto Tech flash chips + // don't return the correct value. So, we default to 2MB which will work for + // larger chips, it just won't use all of the space. + if (data[3] >= 21 && data[3] < 30) { power_of_two = data[3]; } _flash_size = 1 << power_of_two; diff --git a/ports/raspberrypi/supervisor/port.c b/ports/raspberrypi/supervisor/port.c index 794db41dc9..9b3e140a85 100644 --- a/ports/raspberrypi/supervisor/port.c +++ b/ports/raspberrypi/supervisor/port.c @@ -88,7 +88,7 @@ safe_mode_t port_init(void) { // Set brown out. // Copy all of the "tightly coupled memory" code and data to run from RAM. - // This let's us use the 16k cache for dynamically used data and code. + // This lets us use the 16k cache for dynamically used data and code. // We must do this before we try and call any of its code or load the data. for (uint32_t i = 0; i < ((size_t)&_ld_itcm_size) / 4; i++) { (&_ld_itcm_destination)[i] = (&_ld_itcm_flash_copy)[i];