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Addition of support for imxt1010, 1050 and 1060 families

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This commit is contained in:
Dave Marples 2020-02-18 15:21:49 +00:00
parent d388899985
commit f0e5341b0f
6 changed files with 73 additions and 3 deletions
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4
ports/mimxrt10xx/boards/imxrt1020_evk/flash_config.c
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@ -42,7 +42,11 @@ const flexspi_nor_config_t qspiflash_config = {
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromInternally,
#else
.readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
#endif
.csHoldTime = 1u,
.csSetupTime = 2u,
// Enable DDR mode, Wordaddressable, Safe configuration, Differential clock

20
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
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@ -113,6 +113,26 @@ const mcu_periph_obj_t mcu_uart_tx_list[9] = {
PERIPH_PIN(4, 3, kIOMUXC_LPUART4_TXD_SELECT_INPUT, 1, &pin_GPIO_06),
};
const mcu_periph_obj_t mcu_uart_rts_list[4] = {
PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_07),
PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_07),
PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_13),
PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_13)
};
const mcu_periph_obj_t mcu_uart_cts_list[4] = {
PERIPH_PIN(1, 6, 0, 0, &pin_GPIO_08),
PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_AD_08),
PERIPH_PIN(3, 1, 0, 0, &pin_GPIO_AD_14),
PERIPH_PIN(4, 3, 0, 0, &pin_GPIO_AD_14),
};
const mcu_pwm_obj_t mcu_pwm_list[20] = {
PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02),
PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02),

2
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h
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@ -36,6 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[4];
extern const mcu_periph_obj_t mcu_uart_rx_list[9];
extern const mcu_periph_obj_t mcu_uart_tx_list[9];
const mcu_periph_obj_t mcu_uart_rts_list[4];
const mcu_periph_obj_t mcu_uart_cts_list[4];
extern const mcu_pwm_obj_t mcu_pwm_list[20];

40
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
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@ -127,8 +127,8 @@ const mcu_periph_obj_t mcu_uart_rx_list[18] = {
PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_26),
PERIPH_PIN(6, 2, kIOMUXC_LPUART6_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03),
PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32),
PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_09),
PERIPH_PIN(7, 2, kIOMUXC_LPUART7_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_32),
PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B0_05),
PERIPH_PIN(8, 2, kIOMUXC_LPUART8_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B1_11),
@ -163,6 +163,44 @@ const mcu_periph_obj_t mcu_uart_tx_list[18] = {
PERIPH_PIN(8, 2, kIOMUXC_LPUART8_TX_SELECT_INPUT, 2, &pin_GPIO_EMC_38),
};
const mcu_periph_obj_t mcu_uart_rts_list[9] = {
PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_15),
PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_01),
PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_AD_B1_05),
PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_EMC_16),
PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_18),
PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_27),
PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_29),
PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_07),
PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_03),
};
const mcu_periph_obj_t mcu_uart_cts_list[9] = {
PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_14),
PERIPH_PIN(2, 2, 0, 0, &pin_GPIO_AD_B1_00),
PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 0, &pin_GPIO_EMC_15),
PERIPH_PIN(3, 2, kIOMUXC_LPUART3_CTS_B_SELECT_INPUT, 1, &pin_GPIO_AD_B1_04),
PERIPH_PIN(4, 2, 0, 0, &pin_GPIO_EMC_17),
PERIPH_PIN(5, 2, 0, 0, &pin_GPIO_EMC_28),
PERIPH_PIN(6, 2, 0, 0, &pin_GPIO_EMC_30),
PERIPH_PIN(7, 2, 0, 0, &pin_GPIO_SD_B1_06),
PERIPH_PIN(8, 2, 0, 0, &pin_GPIO_SD_B0_02),
};
const mcu_pwm_obj_t mcu_pwm_list[67] = {
PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23),
PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00),

2
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h
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@ -36,6 +36,8 @@ extern const mcu_periph_obj_t mcu_spi_miso_list[8];
extern const mcu_periph_obj_t mcu_uart_rx_list[18];
extern const mcu_periph_obj_t mcu_uart_tx_list[18];
const mcu_periph_obj_t mcu_uart_rts_list[9];
const mcu_periph_obj_t mcu_uart_cts_list[9];
extern const mcu_pwm_obj_t mcu_pwm_list[67];

6
ports/mimxrt10xx/supervisor/flexspi_nor_flash_ops.c
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@ -324,7 +324,11 @@ void flexspi_nor_flash_init(FLEXSPI_Type *base)
config.ahbConfig.enableAHBBufferable = true;
config.ahbConfig.enableReadAddressOpt = true;
config.ahbConfig.enableAHBCachable = true;
config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally; //kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
#ifdef BOARD_USING_SECONDARY_QSPI_PINMUX
config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackInternally;
#else
config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
#endif
FLEXSPI_Init(base, &config);
/* Configure flash settings according to serial flash feature. */