From 3b76299f396d548dfe1eeacefc9a284edbc24e42 Mon Sep 17 00:00:00 2001 From: nitz Date: Sun, 7 Mar 2021 01:06:50 -0500 Subject: [PATCH 1/7] Add new nRF port for SF MicroMod nRF52840. --- .../sparkfun_nrf52840_micromod/README.md | 70 +++++++++++ .../boards/sparkfun_nrf52840_micromod/board.c | 38 ++++++ .../mpconfigboard.h | 60 ++++++++++ .../mpconfigboard.mk | 11 ++ .../boards/sparkfun_nrf52840_micromod/pins.c | 112 ++++++++++++++++++ 5 files changed, 291 insertions(+) create mode 100644 ports/nrf/boards/sparkfun_nrf52840_micromod/README.md create mode 100644 ports/nrf/boards/sparkfun_nrf52840_micromod/board.c create mode 100644 ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h create mode 100644 ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk create mode 100644 ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/README.md b/ports/nrf/boards/sparkfun_nrf52840_micromod/README.md new file mode 100644 index 0000000000..094102c277 --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/README.md @@ -0,0 +1,70 @@ +# SparkFun MicroMod nRF52840 Processor + +Featuring the nRF52840 SoC from Nordic Semiconductor, the [SparkFun MicroMod nRF52840 Processor](https://www.sparkfun.com/products/16984) offers a powerful combination of ARM Cortex-M4 CPU and 2.4 GHz Bluetooth transceiver in the MicroMod form-factor with the M.2 MicroMod connector to allow you to plug in a compatible MicroMod Carrier Board with any number of peripherals. + +The MicroMod nRF52840 Processor features the same Raytac MDBT50Q-P1M found on our [Pro nRF52840 Mini](https://www.sparkfun.com/products/15025). This module includes an integrated trace antenna, fits the IC to an FCC-approved footprint along with including decoupling and timing mechanisms that would need to be designed into a circuit using the bare nRF52840 IC. The Bluetooth transceiver included on the nRF52840 boasts a BT 5.1 stack and supports Bluetooth 5, Bluetooth mesh, IEEE 802.15.4 (Zigbee & Thread) and 2.4Ghz RF wireless protocols (including Nordic's proprietary RF protocol) allowing you to pick which option works best for your application. + +We've also routed two I2C buses, 2 SPI buses, eleven GPIO, dedicated digital, analog, PWM & PDM pins along with multiple serial UARTS to cover nearly all of your peripheral needs. + +## CircuitPython Pin Defs + +CircuitPython pin definitions, while simialr to other boards represent a slight departure from just the typical `A` and `D` pin definitions. The majority of general pins are labled as `G` (or alternatively, `BUS`,) as the MicroMod system they build on uses those names to specify pins that may not be specficially analog or digital. + +This can be somewhat confusing, especially around the analog pins. Here's a quick pin-map. This pin map will use the label either on the [SparkFun MicroMod ATP Carrier Board](https://www.sparkfun.com/products/16885), or the pin name on the [graphical datasheet](https://cdn.sparkfun.com/assets/learn_tutorials/1/4/0/1/MicroMod_nRF52840_v1.0_Graphical_Datasheet.pdf). Some of the aditional aliases are just names to make naming consistent (e.g.: RTS/CTS), but they also can refer to additional functionality a pin may have (e.g.: NFC pins) + +MicroMod Pin # | ATP Pin Label | Pin Definition | Additional Definitons | Pin/Port Reference | Notes +:--------------|:--------------|:--------------|:-----------------------|:-------------------|:------ +8 | G11 | | | (Not Connected) | +10 | D0 | D0 | | P0_27 | +11 | BOOT | BOOT | BUTTON1 | P0_07 | +12 | SDA | SDA | | P0_08 | +13 | RTS1 | RTS | RTS1 | P1_02 | +14 | SCL | SCL | | P0_11 | +15 | CTS1 | CTS | CTS1 | P1_09 | +16 | /I2C INT | I2C_INT | P0_15 | +17 | TX | TX | TX1 | P1_03 | +18 | D1 | D1 | CAM_TRIG | P1_08 | +19 | RX | RX | RX1 | P1_10 | +20 | RX2 | RX2 | | P1_05 | +22 | TX2 | TX2 | | P1_07 | +32 | PWM0 | PWM0 | P0_06 | +34 | A0 | A0 | ADC0 | P0_04 | Attached to AIN2 +38 | A1 | A1 | ADC1 | P0_05 | Attached to AIN3 +40 | G0 | G0 | BUS0 | P0_29 | Attached to AIN5 +42 | G1 | G1 | BUS1 | P0_03 | Attached to AIN1 +44 | G2 | G2 | BUS2 | P1_13 | +46 | G3 | G3 | BUS3 | P1_12 | +47 | PWM1 | PWM1 | P0_16 | +48 | G4 | G4 | BUS4 | P1_11 | +49 | BATT_VIN | BATT_VIN3 | | P0_30 | Attached to AIN6, will be battery voltage / 3. | +50 | PDM_CLK | PDM_CLK | | P0_25 | +51 | SDA1 | SDA1 | | P1_01 | +52 | PDM_DATA | PDM_DATA | | P0_26 | +53 | SCL1 | SCL1 | | P0_24 | +55 | /CS | CS | | P0_20 | +57 | SCK | SCK | | P0_28 | Attached to AIN4 +59 | COPI | COPI | MOSI | P0_31 | Attached to AIN7 +61 | CIPO | CIPO | MISO | P0_02 | +63 | G10 | G10 | NFC2, ADC_DP, CAM_VSYNC | P0_10 | Attached to NFC2 +65 | G9 | G9 | NFC1, ADC_DM, CAM_HSYNC | P0_09 | Attached to NFC1 +67 | G8 | G8 | | P1_14 | +69 | G7 | G7 | BUS7 | P1_04 | +71 | G6 | G6 | BUS6 | P1_06 | +73 | G5 | G5 | BUS5 | P0_15 | + +## Peripheral Naming + +CircuitPython attempts to stay in line with the naming of the serial peripheral naming in the MicroMod system. The bare UART pins are also named 1. The UART 2 pins are named 2. However, the I2C names on MicroMod are and 1. Perhaps this will change in the future, but as of [Interface v1](https://cdn.sparkfun.com/assets/learn_tutorials/1/2/0/6/SparkFun_MicroMod_Interface_v1.0_-_Pin_Descriptions.pdf), it may lead to some confusion. + + +## Bootloader Notes + +The MicroMod nRF52840 Processor needs to have the [Adafruit nRF52 UF2 bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader/pull/194) flashed on it. [[TODO: LINK TO BUILD]] + +## Hardware Reference + +The MicroMod nRF52840 Processor hardware layout is open source: + +* [Schematic](https://cdn.sparkfun.com/assets/f/0/9/9/e/MicroMod_Processor_Board-nRF52840.pdf) +* [Eagle Files](https://cdn.sparkfun.com/assets/3/0/5/d/a/MicroMod_Processor_Board-nRF52840.zip) +* [Hookup Guide](https://learn.sparkfun.com/tutorials/micromod-nrf52840-processor-hookup-guide) diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/board.c b/ports/nrf/boards/sparkfun_nrf52840_micromod/board.c new file mode 100644 index 0000000000..7817933281 --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/board.c @@ -0,0 +1,38 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" + +void board_init(void) { +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h new file mode 100644 index 0000000000..91997710a2 --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h @@ -0,0 +1,60 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * Copyright (c) 2021 Chris Marc Dailey + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "nrfx/hal/nrf_gpio.h" + +#define MICROPY_HW_BOARD_NAME "SparkFun MicroMod nRF52840" +#define MICROPY_HW_MCU_NAME "nRF52840" + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_08) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_28) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_31) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_02) + +#define DEFAULT_UART_BUS_RX (&pin_P1_10) +#define DEFAULT_UART_BUS_TX (&pin_P1_03) + +#define BOARD_HAS_32KHZ_XTAL (1) +#define BOARD_HAS_CRYSTAL (1) + +#if QSPI_FLASH_FILESYSTEM +#define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(0, 14) // Labeled 'SPI_COPI1/SDIO_CMD' in schematic. +#define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 21) // Labeled 'SPI_CIPO1/SDIO_DATA0' in schematic. +#define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 23) // Labeled 'SPI_DATA2' in schematic. +#define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(1, 0) // Labeled 'SPI_CS1/SDIO_DATA3' in schematic. +#define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) // Labeled 'SPI_SCK1/SDIO_CLK' in schematic. +#define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 12) // Labeled 'FLASH_CS' in schematic. +#endif // QSPI_FLASH_FILESYSTEM + +#if SPI_FLASH_FILESYSTEM +#define SPI_FLASH_MOSI_PIN (&pin_P0_14) +#define SPI_FLASH_MISO_PIN (&pin_P0_21) +#define SPI_FLASH_SCK_PIN (&pin_P0_19) +#define SPI_FLASH_CS_PIN (&pin_P0_12) +#endif // SPI_FLASH_FILESYSTEM diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk new file mode 100644 index 0000000000..e6070a0563 --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk @@ -0,0 +1,11 @@ +USB_VID = 0x1B4F +USB_PID = 0xabcd +$(warning SparkFun nRF52840 MicroMod needss USB PID!) +USB_PRODUCT = "SFE_nRF52840_MicroMod" +USB_MANUFACTURER = "SparkFun Electronics" + +MCU_CHIP = nrf52840 + +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q128JV_PM" diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c new file mode 100644 index 0000000000..a8adeacf7a --- /dev/null +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c @@ -0,0 +1,112 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + // D pins (D0-D1) + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27) }, // 0.27 - D0 + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08) }, // 1.08 - D1 | CAM_TRIG + { MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08) }, // CAM_TRIG alias + + // A pins (A0-A1) + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, // 0.04 - A0 | ADC0 (AIN2) + { MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_P0_04) }, // ADC0 alias + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, // 0.05 - A1 | ADC1 (AIN3) + { MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_P0_05) }, // ADC1 alias + + // G pins (G0-G11, G11 NC) + { MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29) }, // 0.29 - G0 | GPIO0 | BUS0 (AIN5) + { MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29) }, // BUS0 alias + { MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03) }, // 0.03 - G1 | GPIO1 | BUS1 (AIN1) + { MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03) }, // BUS1 alias + { MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13) }, // 1.13 - G2 | GPIO2 | BUS2 + { MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13) }, // BUS2 alias + { MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12) }, // 1.12 - G3 | GPIO3 | BUS3 + { MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12) }, // BUS3 alias + { MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11) }, // 1.11 - G4 | GPIO4 | BUS4 + { MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11) }, // BUS4 alias + { MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17) }, // 0.17 - G5 | GPIO5 | BUS5 + { MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17) }, // BUS5 alias + { MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06) }, // 1.06 - G6 | GPIO6 | BUS6 + { MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06) }, // BUS6 alias + { MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04) }, // 1.04 - G7 | GPIO7 | BUS7 + { MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04) }, // BUS7 alias + { MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14) }, // 1.14 - G8 | GPIO8 + { MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09) }, // 0.09 - G9 | GPIO9/NFC1 | ADC_D- | CAM_HSYNC (NFC1) + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, // NFC1 alias + { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09) }, // ADC_DM alias + { MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09) }, // CAM_HSYNC alias + { MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10) }, // 0.10 - G10 | GPIO10/NFC2 | ADC_D+ | CAM_VSYNC (NFC2) + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, // NFC2 alias + { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10) }, // ADC_DP alias + { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10) }, // CAM_VSYNC alias + // NC - G11 + + // PWM pins (PWM0-PWM1) + { MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06) }, // 0.06 - PWM0 + { MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16) }, // 0.16 - PWM1 + + // PDM + { MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25) }, // 0.25 - PDM_CLK | AUD_BCLK + { MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26) }, // 0.26 - PDM_DATA | AUD_LRCLK + + // Battery Voltage Monitor + { MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30) }, // 0.30 - BATT_VIN/3 (AIN6) + + // I2C + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08) }, // 0.08 - SDA + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, // 0.11 - SCL (TRACEDATA2) + + { MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15) }, // 0.15 - I2C_INT + + { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P1_01) }, // 1.01 - SDA1 + { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_24) }, // 0.24 - SCL1 + + // SPI + { MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02) }, // 0.02 - CIPO | SPI_CIPO + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02) }, // MISO alias + { MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31) }, // 0.31 - COPI | SPI_COPI (AIN7) + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31) }, // MOSI alias + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28) }, // 0.28 - SCK | SPI_SCK (AIN4) + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20) }, // 0.20 - /CS | SPI_/CS + + // Flash SPI + { MP_ROM_QSTR(MP_QSTR_IOSCK), MP_ROM_PTR(&pin_P0_19) }, // 0.00 - IOSCK | Flash Serial Clock + { MP_ROM_QSTR(MP_QSTR_IOCSN), MP_ROM_PTR(&pin_P0_12) }, // 0.00 - IOCSN | Flash /Chip Select + { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_P0_14) }, // 0.00 - IO0 | Flash Data 0 + { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_P0_21) }, // 0.00 - IO1 | Flash Data 1 + { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_P0_23) }, // 0.00 - IO2 | Flash Data 2 + { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_P1_00) }, // 0.00 - IO3 | Flash Data 3 + + // Reset Pin + { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14) }, // 0.18 - /RESET (NRESET) + + // LED + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13) }, // 0.13 - LED_BUILTIN | STAT | Blue LED + + // Button + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_07) }, // 0.07 - /BOOT [Active Low] (TRACECLK) - Is button on carriers. + { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07) }, // BOOT alias + + // UART + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, // 1.10 - UART RX | RX1 + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_P1_10) }, // RX1 alias + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, // 1.03 - UART TX | TX1 + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_P1_03) }, // TX1 alias + { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P1_09) }, // 1.09 - UART CTS | CTS1 (TRACEDATA3) + { MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_P1_09) }, // CTS1 alias + { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P1_02) }, // 1.02 - UART RTS | RTS1 + { MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_P1_02) }, // RTS1 alias + + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_P1_05) }, // 1.05 - UART RX | RX2 + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_P1_07) }, // 1.07 - UART TX | TX2 + + // Crystal + { MP_ROM_QSTR(MP_QSTR_XL1), MP_ROM_PTR(&pin_P0_00) }, // 0.00 - XL1 | 32.768kHz Crystal Pin 1 + { MP_ROM_QSTR(MP_QSTR_XL2), MP_ROM_PTR(&pin_P0_01) }, // 0.01 - XL2 | 32.768kHz Crystal Pin 2 + + // Board Objects + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); From 8e8368d59452b1d54f9d0a87feb49896ada24b99 Mon Sep 17 00:00:00 2001 From: nitz Date: Sun, 7 Mar 2021 01:25:31 -0500 Subject: [PATCH 2/7] Add sparkfun_nrf52840_micromod to `build.yml` --- .github/workflows/build.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 32e3bc900c..34f4c43cb4 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -314,6 +314,7 @@ jobs: - "simmel" - "snekboard" - "sparkfun_lumidrive" + - "sparkfun_nrf52840_micromod" - "sparkfun_nrf52840_mini" - "sparkfun_qwiic_micro_no_flash" - "sparkfun_qwiic_micro_with_flash" From a61db7f12e4278e39ae7096dd975a4285127416c Mon Sep 17 00:00:00 2001 From: Chris Dailey Date: Tue, 9 Mar 2021 12:54:52 -0500 Subject: [PATCH 3/7] Updated SparkFun MicroMod USB PID As per the PID provide by TheHoff, [here](https://forum.sparkfun.com/viewtopic.php?p=223812#p223812) --- .../mpconfigboard.mk | 73 ++++++++++++++++--- 1 file changed, 64 insertions(+), 9 deletions(-) diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk index e6070a0563..1a0d23c266 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk @@ -1,11 +1,66 @@ -USB_VID = 0x1B4F -USB_PID = 0xabcd -$(warning SparkFun nRF52840 MicroMod needss USB PID!) -USB_PRODUCT = "SFE_nRF52840_MicroMod" -USB_MANUFACTURER = "SparkFun Electronics" +/* + * The MIT License (MIT) + * + * Copyright (c) 2018 Ha Thach for Adafruit Industries + * Copyright (c) 2021 Chris Marc Dailey + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ -MCU_CHIP = nrf52840 +#ifndef _SPARKFUN_NRF52840_MICROMOD_H_ +#define _SPARKFUN_NRF52840_MICROMOD_H_ -QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = "W25Q128JV_PM" +#define _PINNUM(port, pin) ((port)*32 + (pin)) + +/*------------------------------------------------------------------*/ +/* LED + *------------------------------------------------------------------*/ +#define LEDS_NUMBER 1 +#define LED_PRIMARY_PIN _PINNUM(0, 13) +#define LED_STATE_ON 1 + +/*------------------------------------------------------------------*/ +/* BUTTON + *------------------------------------------------------------------*/ +#define BUTTONS_NUMBER 2 +#define BUTTON_1 _PINNUM(0, 7) +#define BUTTON_2 _PINNUM(0, 10) +#define BUTTON_PULL NRF_GPIO_PIN_PULLUP + +//--------------------------------------------------------------------+ +// BLE OTA +//--------------------------------------------------------------------+ +#define BLEDIS_MANUFACTURER "SparkFun" +#define BLEDIS_MODEL "MicroMod nRF52840" + +//--------------------------------------------------------------------+ +// USB +//--------------------------------------------------------------------+ +#define USB_DESC_VID 0x1B4F +#define USB_DESC_UF2_PID 0x0022 +#define USB_DESC_CDC_ONLY_PID 0x0023 + +//------------- UF2 -------------// +#define UF2_PRODUCT_NAME "SparkFun MicroMod nRF52840" +#define UF2_VOLUME_LABEL "SFMM852BOOT" +#define UF2_BOARD_ID "micromod-nRF52840" + +#define UF2_INDEX_URL "https://www.sparkfun.com/products/16984" + +#endif /* _SPARKFUN_NRF52840_MICROMOD_H_ */ From 1ae858126acb02c461de8f30e99b2961995b305a Mon Sep 17 00:00:00 2001 From: nitz Date: Tue, 9 Mar 2021 17:29:10 -0500 Subject: [PATCH 4/7] Fix the mpconfigboard.mk that was screwy? --- .../mpconfigboard.mk | 72 +++---------------- 1 file changed, 8 insertions(+), 64 deletions(-) diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk index 1a0d23c266..4c4bcd0896 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk @@ -1,66 +1,10 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018 Ha Thach for Adafruit Industries - * Copyright (c) 2021 Chris Marc Dailey - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ +USB_VID = 0x1B4F +USB_PID = 0x0021 +USB_PRODUCT = "SFE_nRF52840_MicroMod" +USB_MANUFACTURER = "SparkFun Electronics" -#ifndef _SPARKFUN_NRF52840_MICROMOD_H_ -#define _SPARKFUN_NRF52840_MICROMOD_H_ +MCU_CHIP = nrf52840 -#define _PINNUM(port, pin) ((port)*32 + (pin)) - -/*------------------------------------------------------------------*/ -/* LED - *------------------------------------------------------------------*/ -#define LEDS_NUMBER 1 -#define LED_PRIMARY_PIN _PINNUM(0, 13) -#define LED_STATE_ON 1 - -/*------------------------------------------------------------------*/ -/* BUTTON - *------------------------------------------------------------------*/ -#define BUTTONS_NUMBER 2 -#define BUTTON_1 _PINNUM(0, 7) -#define BUTTON_2 _PINNUM(0, 10) -#define BUTTON_PULL NRF_GPIO_PIN_PULLUP - -//--------------------------------------------------------------------+ -// BLE OTA -//--------------------------------------------------------------------+ -#define BLEDIS_MANUFACTURER "SparkFun" -#define BLEDIS_MODEL "MicroMod nRF52840" - -//--------------------------------------------------------------------+ -// USB -//--------------------------------------------------------------------+ -#define USB_DESC_VID 0x1B4F -#define USB_DESC_UF2_PID 0x0022 -#define USB_DESC_CDC_ONLY_PID 0x0023 - -//------------- UF2 -------------// -#define UF2_PRODUCT_NAME "SparkFun MicroMod nRF52840" -#define UF2_VOLUME_LABEL "SFMM852BOOT" -#define UF2_BOARD_ID "micromod-nRF52840" - -#define UF2_INDEX_URL "https://www.sparkfun.com/products/16984" - -#endif /* _SPARKFUN_NRF52840_MICROMOD_H_ */ +QSPI_FLASH_FILESYSTEM = 1 +EXTERNAL_FLASH_DEVICE_COUNT = 1 +EXTERNAL_FLASH_DEVICES = "W25Q128JV_PM" From fe0655e121a1433d7e773672883b25fa78f6cb95 Mon Sep 17 00:00:00 2001 From: nitz Date: Tue, 9 Mar 2021 17:39:29 -0500 Subject: [PATCH 5/7] Update pins, remove unused defs from board config. --- .../mpconfigboard.h | 7 - .../boards/sparkfun_nrf52840_micromod/pins.c | 149 +++++++++--------- 2 files changed, 72 insertions(+), 84 deletions(-) diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h index 91997710a2..c53fc45d22 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.h @@ -51,10 +51,3 @@ #define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 19) // Labeled 'SPI_SCK1/SDIO_CLK' in schematic. #define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(0, 12) // Labeled 'FLASH_CS' in schematic. #endif // QSPI_FLASH_FILESYSTEM - -#if SPI_FLASH_FILESYSTEM -#define SPI_FLASH_MOSI_PIN (&pin_P0_14) -#define SPI_FLASH_MISO_PIN (&pin_P0_21) -#define SPI_FLASH_SCK_PIN (&pin_P0_19) -#define SPI_FLASH_CS_PIN (&pin_P0_12) -#endif // SPI_FLASH_FILESYSTEM diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c index a8adeacf7a..bd457f14a9 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c @@ -2,111 +2,106 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { // D pins (D0-D1) - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27) }, // 0.27 - D0 - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08) }, // 1.08 - D1 | CAM_TRIG - { MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08) }, // CAM_TRIG alias + {MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27)}, // 0.27 - D0 + {MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08)}, // 1.08 - D1 | CAM_TRIG + {MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08)}, // CAM_TRIG alias // A pins (A0-A1) - { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, // 0.04 - A0 | ADC0 (AIN2) - { MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_P0_04) }, // ADC0 alias - { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, // 0.05 - A1 | ADC1 (AIN3) - { MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_P0_05) }, // ADC1 alias + {MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04)}, // 0.04 - A0 | ADC0 (AIN2) + {MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_P0_04)}, // ADC0 alias + {MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05)}, // 0.05 - A1 | ADC1 (AIN3) + {MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_P0_05)}, // ADC1 alias // G pins (G0-G11, G11 NC) - { MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29) }, // 0.29 - G0 | GPIO0 | BUS0 (AIN5) - { MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29) }, // BUS0 alias - { MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03) }, // 0.03 - G1 | GPIO1 | BUS1 (AIN1) - { MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03) }, // BUS1 alias - { MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13) }, // 1.13 - G2 | GPIO2 | BUS2 - { MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13) }, // BUS2 alias - { MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12) }, // 1.12 - G3 | GPIO3 | BUS3 - { MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12) }, // BUS3 alias - { MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11) }, // 1.11 - G4 | GPIO4 | BUS4 - { MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11) }, // BUS4 alias - { MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17) }, // 0.17 - G5 | GPIO5 | BUS5 - { MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17) }, // BUS5 alias - { MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06) }, // 1.06 - G6 | GPIO6 | BUS6 - { MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06) }, // BUS6 alias - { MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04) }, // 1.04 - G7 | GPIO7 | BUS7 - { MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04) }, // BUS7 alias - { MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14) }, // 1.14 - G8 | GPIO8 - { MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09) }, // 0.09 - G9 | GPIO9/NFC1 | ADC_D- | CAM_HSYNC (NFC1) - { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, // NFC1 alias - { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09) }, // ADC_DM alias - { MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09) }, // CAM_HSYNC alias - { MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10) }, // 0.10 - G10 | GPIO10/NFC2 | ADC_D+ | CAM_VSYNC (NFC2) - { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, // NFC2 alias - { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10) }, // ADC_DP alias - { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10) }, // CAM_VSYNC alias - // NC - G11 + {MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29)}, // 0.29 - G0 | GPIO0 | BUS0 (AIN5) + {MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29)}, // BUS0 alias + {MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03)}, // 0.03 - G1 | GPIO1 | BUS1 (AIN1) + {MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03)}, // BUS1 alias + {MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13)}, // 1.13 - G2 | GPIO2 | BUS2 + {MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13)}, // BUS2 alias + {MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12)}, // 1.12 - G3 | GPIO3 | BUS3 + {MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12)}, // BUS3 alias + {MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11)}, // 1.11 - G4 | GPIO4 | BUS4 + {MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11)}, // BUS4 alias + {MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17)}, // 0.17 - G5 | GPIO5 | BUS5 + {MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17)}, // BUS5 alias + {MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06)}, // 1.06 - G6 | GPIO6 | BUS6 + {MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06)}, // BUS6 alias + {MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04)}, // 1.04 - G7 | GPIO7 | BUS7 + {MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04)}, // BUS7 alias + {MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14)}, // 1.14 - G8 | GPIO8 + {MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09)}, // 0.09 - G9 | GPIO9/NFC1 | ADC_D- | CAM_HSYNC (NFC1) + {MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09)}, // NFC1 alias + {MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09)}, // ADC_DM alias + {MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09)}, // CAM_HSYNC alias + {MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10)}, // 0.10 - G10 | GPIO10/NFC2 | ADC_D+ | CAM_VSYNC (NFC2) + {MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10)}, // NFC2 alias + {MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10)}, // ADC_DP alias + {MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10)}, // CAM_VSYNC alias + // NC - G11 // PWM pins (PWM0-PWM1) - { MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06) }, // 0.06 - PWM0 - { MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16) }, // 0.16 - PWM1 + {MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06)}, // 0.06 - PWM0 + {MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16)}, // 0.16 - PWM1 // PDM - { MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25) }, // 0.25 - PDM_CLK | AUD_BCLK - { MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26) }, // 0.26 - PDM_DATA | AUD_LRCLK + {MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25)}, // 0.25 - PDM_CLK | AUD_BCLK + {MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26)}, // 0.26 - PDM_DATA | AUD_LRCLK // Battery Voltage Monitor - { MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30) }, // 0.30 - BATT_VIN/3 (AIN6) + {MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30)}, // 0.30 - BATT_VIN/3 (AIN6) // I2C - { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08) }, // 0.08 - SDA - { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, // 0.11 - SCL (TRACEDATA2) + {MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08)}, // 0.08 - SDA + {MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11)}, // 0.11 - SCL (TRACEDATA2) - { MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15) }, // 0.15 - I2C_INT + {MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15)}, // 0.15 - I2C_INT - { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P1_01) }, // 1.01 - SDA1 - { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_24) }, // 0.24 - SCL1 + {MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P1_01)}, // 1.01 - SDA1 + {MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_24)}, // 0.24 - SCL1 // SPI - { MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02) }, // 0.02 - CIPO | SPI_CIPO - { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02) }, // MISO alias - { MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31) }, // 0.31 - COPI | SPI_COPI (AIN7) - { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31) }, // MOSI alias - { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28) }, // 0.28 - SCK | SPI_SCK (AIN4) - { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20) }, // 0.20 - /CS | SPI_/CS + {MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02)}, // 0.02 - CIPO | SPI_CIPO + {MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02)}, // MISO alias + {MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31)}, // 0.31 - COPI | SPI_COPI (AIN7) + {MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31)}, // MOSI alias + {MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28)}, // 0.28 - SCK | SPI_SCK (AIN4) + {MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20)}, // 0.20 - /CS | SPI_/CS - // Flash SPI - { MP_ROM_QSTR(MP_QSTR_IOSCK), MP_ROM_PTR(&pin_P0_19) }, // 0.00 - IOSCK | Flash Serial Clock - { MP_ROM_QSTR(MP_QSTR_IOCSN), MP_ROM_PTR(&pin_P0_12) }, // 0.00 - IOCSN | Flash /Chip Select - { MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_P0_14) }, // 0.00 - IO0 | Flash Data 0 - { MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_P0_21) }, // 0.00 - IO1 | Flash Data 1 - { MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_P0_23) }, // 0.00 - IO2 | Flash Data 2 - { MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_P1_00) }, // 0.00 - IO3 | Flash Data 3 + // QSPI, used by flash on this board, but is broken out on MicroMod connector. + {MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19)}, // 0.00 - IOSCK | Flash Serial Clock + {MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14)}, // 0.00 - IO0 | Flash Data 0 + {MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21)}, // 0.00 - IO1 | Flash Data 1 + {MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23)}, // 0.00 - IO2 | Flash Data 2 + {MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00)}, // 0.00 - IO3 | Flash Data 3 // Reset Pin - { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14) }, // 0.18 - /RESET (NRESET) + {MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14)}, // 0.18 - /RESET (NRESET) // LED - { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13) }, // 0.13 - LED_BUILTIN | STAT | Blue LED + {MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13)}, // 0.13 - LED_BUILTIN | STAT | Blue LED // Button - { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_07) }, // 0.07 - /BOOT [Active Low] (TRACECLK) - Is button on carriers. - { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07) }, // BOOT alias + {MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_07)}, // 0.07 - /BOOT [Active Low] (TRACECLK) - Is button on carriers. + {MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07)}, // BOOT alias // UART - { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, // 1.10 - UART RX | RX1 - { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_P1_10) }, // RX1 alias - { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, // 1.03 - UART TX | TX1 - { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_P1_03) }, // TX1 alias - { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P1_09) }, // 1.09 - UART CTS | CTS1 (TRACEDATA3) - { MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_P1_09) }, // CTS1 alias - { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P1_02) }, // 1.02 - UART RTS | RTS1 - { MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_P1_02) }, // RTS1 alias + {MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10)}, // 1.10 - UART RX | RX1 + {MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_P1_10)}, // RX1 alias + {MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03)}, // 1.03 - UART TX | TX1 + {MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_P1_03)}, // TX1 alias + {MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P1_09)}, // 1.09 - UART CTS | CTS1 (TRACEDATA3) + {MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_P1_09)}, // CTS1 alias + {MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P1_02)}, // 1.02 - UART RTS | RTS1 + {MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_P1_02)}, // RTS1 alias - { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_P1_05) }, // 1.05 - UART RX | RX2 - { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_P1_07) }, // 1.07 - UART TX | TX2 - - // Crystal - { MP_ROM_QSTR(MP_QSTR_XL1), MP_ROM_PTR(&pin_P0_00) }, // 0.00 - XL1 | 32.768kHz Crystal Pin 1 - { MP_ROM_QSTR(MP_QSTR_XL2), MP_ROM_PTR(&pin_P0_01) }, // 0.01 - XL2 | 32.768kHz Crystal Pin 2 + {MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_P1_05)}, // 1.05 - UART RX | RX2 + {MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_P1_07)}, // 1.07 - UART TX | TX2 // Board Objects - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + {MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj)}, + {MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj)}, + {MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj)}, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); From 5beb529f61d9da1d8cf446a12d47725d0e14459e Mon Sep 17 00:00:00 2001 From: nitz Date: Tue, 9 Mar 2021 17:39:29 -0500 Subject: [PATCH 6/7] Update pins, remove unused defs from board config. --- .../boards/sparkfun_nrf52840_micromod/pins.c | 142 +++++++++--------- 1 file changed, 71 insertions(+), 71 deletions(-) diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c index bd457f14a9..389d5f6b97 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c @@ -2,106 +2,106 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { // D pins (D0-D1) - {MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27)}, // 0.27 - D0 - {MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08)}, // 1.08 - D1 | CAM_TRIG - {MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08)}, // CAM_TRIG alias + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P0_27) }, // 0.27 - D0 + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_08) }, // 1.08 - D1 | CAM_TRIG + { MP_ROM_QSTR(MP_QSTR_CAM_TRIG), MP_ROM_PTR(&pin_P1_08) }, // CAM_TRIG alias // A pins (A0-A1) - {MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04)}, // 0.04 - A0 | ADC0 (AIN2) - {MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_P0_04)}, // ADC0 alias - {MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05)}, // 0.05 - A1 | ADC1 (AIN3) - {MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_P0_05)}, // ADC1 alias + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_04) }, // 0.04 - A0 | ADC0 (AIN2) + { MP_ROM_QSTR(MP_QSTR_ADC0), MP_ROM_PTR(&pin_P0_04) }, // ADC0 alias + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_05) }, // 0.05 - A1 | ADC1 (AIN3) + { MP_ROM_QSTR(MP_QSTR_ADC1), MP_ROM_PTR(&pin_P0_05) }, // ADC1 alias // G pins (G0-G11, G11 NC) - {MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29)}, // 0.29 - G0 | GPIO0 | BUS0 (AIN5) - {MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29)}, // BUS0 alias - {MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03)}, // 0.03 - G1 | GPIO1 | BUS1 (AIN1) - {MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03)}, // BUS1 alias - {MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13)}, // 1.13 - G2 | GPIO2 | BUS2 - {MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13)}, // BUS2 alias - {MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12)}, // 1.12 - G3 | GPIO3 | BUS3 - {MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12)}, // BUS3 alias - {MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11)}, // 1.11 - G4 | GPIO4 | BUS4 - {MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11)}, // BUS4 alias - {MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17)}, // 0.17 - G5 | GPIO5 | BUS5 - {MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17)}, // BUS5 alias - {MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06)}, // 1.06 - G6 | GPIO6 | BUS6 - {MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06)}, // BUS6 alias - {MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04)}, // 1.04 - G7 | GPIO7 | BUS7 - {MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04)}, // BUS7 alias - {MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14)}, // 1.14 - G8 | GPIO8 - {MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09)}, // 0.09 - G9 | GPIO9/NFC1 | ADC_D- | CAM_HSYNC (NFC1) - {MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09)}, // NFC1 alias - {MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09)}, // ADC_DM alias - {MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09)}, // CAM_HSYNC alias - {MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10)}, // 0.10 - G10 | GPIO10/NFC2 | ADC_D+ | CAM_VSYNC (NFC2) - {MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10)}, // NFC2 alias - {MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10)}, // ADC_DP alias - {MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10)}, // CAM_VSYNC alias - // NC - G11 + { MP_ROM_QSTR(MP_QSTR_G0), MP_ROM_PTR(&pin_P0_29) }, // 0.29 - G0 | GPIO0 | BUS0 (AIN5) + { MP_ROM_QSTR(MP_QSTR_BUS0), MP_ROM_PTR(&pin_P0_29) }, // BUS0 alias + { MP_ROM_QSTR(MP_QSTR_G1), MP_ROM_PTR(&pin_P0_03) }, // 0.03 - G1 | GPIO1 | BUS1 (AIN1) + { MP_ROM_QSTR(MP_QSTR_BUS1), MP_ROM_PTR(&pin_P0_03) }, // BUS1 alias + { MP_ROM_QSTR(MP_QSTR_G2), MP_ROM_PTR(&pin_P1_13) }, // 1.13 - G2 | GPIO2 | BUS2 + { MP_ROM_QSTR(MP_QSTR_BUS2), MP_ROM_PTR(&pin_P1_13) }, // BUS2 alias + { MP_ROM_QSTR(MP_QSTR_G3), MP_ROM_PTR(&pin_P1_12) }, // 1.12 - G3 | GPIO3 | BUS3 + { MP_ROM_QSTR(MP_QSTR_BUS3), MP_ROM_PTR(&pin_P1_12) }, // BUS3 alias + { MP_ROM_QSTR(MP_QSTR_G4), MP_ROM_PTR(&pin_P1_11) }, // 1.11 - G4 | GPIO4 | BUS4 + { MP_ROM_QSTR(MP_QSTR_BUS4), MP_ROM_PTR(&pin_P1_11) }, // BUS4 alias + { MP_ROM_QSTR(MP_QSTR_G5), MP_ROM_PTR(&pin_P0_17) }, // 0.17 - G5 | GPIO5 | BUS5 + { MP_ROM_QSTR(MP_QSTR_BUS5), MP_ROM_PTR(&pin_P0_17) }, // BUS5 alias + { MP_ROM_QSTR(MP_QSTR_G6), MP_ROM_PTR(&pin_P1_06) }, // 1.06 - G6 | GPIO6 | BUS6 + { MP_ROM_QSTR(MP_QSTR_BUS6), MP_ROM_PTR(&pin_P1_06) }, // BUS6 alias + { MP_ROM_QSTR(MP_QSTR_G7), MP_ROM_PTR(&pin_P1_04) }, // 1.04 - G7 | GPIO7 | BUS7 + { MP_ROM_QSTR(MP_QSTR_BUS7), MP_ROM_PTR(&pin_P1_04) }, // BUS7 alias + { MP_ROM_QSTR(MP_QSTR_G8), MP_ROM_PTR(&pin_P1_14) }, // 1.14 - G8 | GPIO8 + { MP_ROM_QSTR(MP_QSTR_G9), MP_ROM_PTR(&pin_P0_09) }, // 0.09 - G9 | GPIO9/NFC1 | ADC_D- | CAM_HSYNC (NFC1) + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, // NFC1 alias + { MP_ROM_QSTR(MP_QSTR_ADC_DM), MP_ROM_PTR(&pin_P0_09) }, // ADC_DM alias + { MP_ROM_QSTR(MP_QSTR_CAM_HSYNC), MP_ROM_PTR(&pin_P0_09) }, // CAM_HSYNC alias + { MP_ROM_QSTR(MP_QSTR_G10), MP_ROM_PTR(&pin_P0_10) }, // 0.10 - G10 | GPIO10/NFC2 | ADC_D+ | CAM_VSYNC (NFC2) + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, // NFC2 alias + { MP_ROM_QSTR(MP_QSTR_ADC_DP), MP_ROM_PTR(&pin_P0_10) }, // ADC_DP alias + { MP_ROM_QSTR(MP_QSTR_CAM_VSYNC), MP_ROM_PTR(&pin_P0_10) }, // CAM_VSYNC alias + // NC - G11 // PWM pins (PWM0-PWM1) - {MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06)}, // 0.06 - PWM0 - {MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16)}, // 0.16 - PWM1 + { MP_ROM_QSTR(MP_QSTR_PWM0), MP_ROM_PTR(&pin_P0_06) }, // 0.06 - PWM0 + { MP_ROM_QSTR(MP_QSTR_PWM1), MP_ROM_PTR(&pin_P0_16) }, // 0.16 - PWM1 // PDM - {MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25)}, // 0.25 - PDM_CLK | AUD_BCLK - {MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26)}, // 0.26 - PDM_DATA | AUD_LRCLK + { MP_ROM_QSTR(MP_QSTR_PDM_CLK), MP_ROM_PTR(&pin_P0_25) }, // 0.25 - PDM_CLK | AUD_BCLK + { MP_ROM_QSTR(MP_QSTR_PDM_DATA), MP_ROM_PTR(&pin_P0_26) }, // 0.26 - PDM_DATA | AUD_LRCLK // Battery Voltage Monitor - {MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30)}, // 0.30 - BATT_VIN/3 (AIN6) + { MP_ROM_QSTR(MP_QSTR_BATT_VIN3), MP_ROM_PTR(&pin_P0_30) }, // 0.30 - BATT_VIN/3 (AIN6) // I2C - {MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08)}, // 0.08 - SDA - {MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11)}, // 0.11 - SCL (TRACEDATA2) + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_08) }, // 0.08 - SDA + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_11) }, // 0.11 - SCL (TRACEDATA2) - {MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15)}, // 0.15 - I2C_INT + { MP_ROM_QSTR(MP_QSTR_I2C_INT), MP_ROM_PTR(&pin_P0_15) }, // 0.15 - I2C_INT - {MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P1_01)}, // 1.01 - SDA1 - {MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_24)}, // 0.24 - SCL1 + { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_P1_01) }, // 1.01 - SDA1 + { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_P0_24) }, // 0.24 - SCL1 // SPI - {MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02)}, // 0.02 - CIPO | SPI_CIPO - {MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02)}, // MISO alias - {MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31)}, // 0.31 - COPI | SPI_COPI (AIN7) - {MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31)}, // MOSI alias - {MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28)}, // 0.28 - SCK | SPI_SCK (AIN4) - {MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20)}, // 0.20 - /CS | SPI_/CS + { MP_ROM_QSTR(MP_QSTR_CIPO), MP_ROM_PTR(&pin_P0_02) }, // 0.02 - CIPO | SPI_CIPO + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_02) }, // MISO alias + { MP_ROM_QSTR(MP_QSTR_COPI), MP_ROM_PTR(&pin_P0_31) }, // 0.31 - COPI | SPI_COPI (AIN7) + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_31) }, // MOSI alias + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28) }, // 0.28 - SCK | SPI_SCK (AIN4) + { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20) }, // 0.20 - /CS | SPI_/CS // QSPI, used by flash on this board, but is broken out on MicroMod connector. - {MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19)}, // 0.00 - IOSCK | Flash Serial Clock - {MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14)}, // 0.00 - IO0 | Flash Data 0 - {MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21)}, // 0.00 - IO1 | Flash Data 1 - {MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23)}, // 0.00 - IO2 | Flash Data 2 - {MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00)}, // 0.00 - IO3 | Flash Data 3 + { MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19) }, // 0.00 - IOSCK | Flash Serial Clock + { MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14) }, // 0.00 - IO0 | Flash Data 0 + { MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21) }, // 0.00 - IO1 | Flash Data 1 + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23) },// 0.00 - IO2 | Flash Data 2 + { MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00) }, // 0.00 - IO3 | Flash Data 3 // Reset Pin - {MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14)}, // 0.18 - /RESET (NRESET) + { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14) }, // 0.18 - /RESET (NRESET) // LED - {MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13)}, // 0.13 - LED_BUILTIN | STAT | Blue LED + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13) }, // 0.13 - LED_BUILTIN | STAT | Blue LED // Button - {MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_07)}, // 0.07 - /BOOT [Active Low] (TRACECLK) - Is button on carriers. - {MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07)}, // BOOT alias + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_07) }, // 0.07 - /BOOT [Active Low] (TRACECLK) - Is button on carriers. + { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_P0_07) }, // BOOT alias // UART - {MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10)}, // 1.10 - UART RX | RX1 - {MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_P1_10)}, // RX1 alias - {MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03)}, // 1.03 - UART TX | TX1 - {MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_P1_03)}, // TX1 alias - {MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P1_09)}, // 1.09 - UART CTS | CTS1 (TRACEDATA3) - {MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_P1_09)}, // CTS1 alias - {MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P1_02)}, // 1.02 - UART RTS | RTS1 - {MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_P1_02)}, // RTS1 alias + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_10) }, // 1.10 - UART RX | RX1 + { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_P1_10) }, // RX1 alias + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_03) }, // 1.03 - UART TX | TX1 + { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_P1_03) }, // TX1 alias + { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_PTR(&pin_P1_09) }, // 1.09 - UART CTS | CTS1 (TRACEDATA3) + { MP_ROM_QSTR(MP_QSTR_CTS1), MP_ROM_PTR(&pin_P1_09) }, // CTS1 alias + { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_PTR(&pin_P1_02) }, // 1.02 - UART RTS | RTS1 + { MP_ROM_QSTR(MP_QSTR_RTS1), MP_ROM_PTR(&pin_P1_02) }, // RTS1 alias - {MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_P1_05)}, // 1.05 - UART RX | RX2 - {MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_P1_07)}, // 1.07 - UART TX | TX2 + { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_P1_05) }, // 1.05 - UART RX | RX2 + { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_P1_07) }, // 1.07 - UART TX | TX2 // Board Objects - {MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj)}, - {MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj)}, - {MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj)}, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); From d5365cb066137b6f2240a1eb24ee1ac812c3e080 Mon Sep 17 00:00:00 2001 From: nitz Date: Tue, 9 Mar 2021 18:36:29 -0500 Subject: [PATCH 7/7] =?UTF-8?q?SDIO/QSPI=20pin=20names.=20=C2=AF\=5F(?= =?UTF-8?q?=E3=83=84)=5F/=C2=AF?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../boards/sparkfun_nrf52840_micromod/pins.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c index 389d5f6b97..65700f24e4 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/pins.c @@ -68,12 +68,18 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_28) }, // 0.28 - SCK | SPI_SCK (AIN4) { MP_ROM_QSTR(MP_QSTR_CS), MP_ROM_PTR(&pin_P0_20) }, // 0.20 - /CS | SPI_/CS - // QSPI, used by flash on this board, but is broken out on MicroMod connector. - { MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19) }, // 0.00 - IOSCK | Flash Serial Clock - { MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14) }, // 0.00 - IO0 | Flash Data 0 - { MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21) }, // 0.00 - IO1 | Flash Data 1 - { MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23) },// 0.00 - IO2 | Flash Data 2 - { MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00) }, // 0.00 - IO3 | Flash Data 3 + // QSPI, used by flash on this board, but is broken out + // on the MicroMod connector, to to the SDIO pins. + { MP_ROM_QSTR(MP_QSTR_SDIO_CLK), MP_ROM_PTR(&pin_P0_19) }, // 0.00 - SDIO SCK | Used as: QSPI flash SCK + { MP_ROM_QSTR(MP_QSTR_SPI_SCK1), MP_ROM_PTR(&pin_P0_19) }, // SPI_SCK1 alias + { MP_ROM_QSTR(MP_QSTR_SDIO_CMD), MP_ROM_PTR(&pin_P0_14) }, // 0.00 - SDIO CMD | Used as: QSPI flash D0 (or SDI) + { MP_ROM_QSTR(MP_QSTR_SPI_COPI1), MP_ROM_PTR(&pin_P0_14) }, // SPI_COPI1 alias + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA0), MP_ROM_PTR(&pin_P0_21) },// 0.00 - SDIO DATA0 | Used as: QSPI flash D1 (or SDO) + { MP_ROM_QSTR(MP_QSTR_SPI_CIPO1), MP_ROM_PTR(&pin_P0_21) }, // SPI_CIPO1 alias + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA1), MP_ROM_PTR(&pin_P0_22) },// 0.00 - SDIO DATA1 | Unused for flash. + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA2), MP_ROM_PTR(&pin_P0_23) },// 0.00 - SDIO DATA2 | Used as: QSPI flash D2 + { MP_ROM_QSTR(MP_QSTR_SDIO_DATA3), MP_ROM_PTR(&pin_P1_00) },// 0.00 - SDIO DATA3 | Use das: QSPI flash D3 (or /HOLD) + { MP_ROM_QSTR(MP_QSTR_SPI_CS1), MP_ROM_PTR(&pin_P1_00) }, // SPI_CS1 alias // Reset Pin { MP_ROM_QSTR(MP_QSTR_RESET), MP_ROM_PTR(&pin_P1_14) }, // 0.18 - /RESET (NRESET)