From ed3f636be5aaaaebea8e44746ea88298c6d187df Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Mon, 15 Mar 2021 16:13:39 +0100 Subject: [PATCH] spresense: empty rx uart fifo after initialization --- ports/cxd56/common-hal/busio/UART.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/ports/cxd56/common-hal/busio/UART.c b/ports/cxd56/common-hal/busio/UART.c index 52d2afc0c2..30e1dad01a 100644 --- a/ports/cxd56/common-hal/busio/UART.c +++ b/ports/cxd56/common-hal/busio/UART.c @@ -59,6 +59,9 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, uint32_t baudrate, uint8_t bits, busio_uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size, byte* receiver_buffer, bool sigint_enabled) { + int i; + int count; + char tmp; struct termios tio; if ((rts != NULL) || (cts != NULL) || (rs485_dir != NULL) || (rs485_invert)) { @@ -96,6 +99,14 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self, if (busio_uart_dev[self->number].fd < 0) { mp_raise_ValueError(translate("Could not initialize UART")); } + + // Wait to make sure the UART is ready + usleep(1000); + // Clear RX FIFO + ioctl(busio_uart_dev[self->number].fd, FIONREAD, (long unsigned int)&count); + for (i = 0; i < count; i++) { + read(busio_uart_dev[self->number].fd, &tmp, 1); + } } ioctl(busio_uart_dev[self->number].fd, TCGETS, (long unsigned int)&tio);