Add hack tablet
This commit is contained in:
Jeff Epler
parent
c3c2b84584
commit
eb060184c2
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "supervisor/board.h"
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#include "mpconfigboard.h"
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#include "shared-bindings/microcontroller/Pin.h"
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void board_init(void) {
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// Debug UART
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#ifdef DEBUG
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common_hal_never_reset_pin(&pin_GPIO43);
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common_hal_never_reset_pin(&pin_GPIO44);
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#endif
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}
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// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
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@ -0,0 +1,42 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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// Micropython setup
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#define MICROPY_HW_BOARD_NAME "ESP32-S3-DevKitC-1-N8R8-with-HACKTABLET"
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#define MICROPY_HW_MCU_NAME "ESP32S3"
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#define MICROPY_HW_NEOPIXEL (&pin_GPIO48)
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#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
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#define DEFAULT_UART_BUS_TX (&pin_GPIO43)
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// UART pins attached to the USB-serial converter chip
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#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO43)
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#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO44)
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// a 1024x768 16BPP framebuffer + some breathing room
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#define DEFAULT_RESERVED_PSRAM (1024 * 1024 * 2)
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USB_VID = 0x303A
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USB_PID = 0x7003
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USB_PRODUCT = "ESP32-S3-DevKitC-1-N8R8"
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USB_MANUFACTURER = "Espressif"
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IDF_TARGET = esp32s3
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CIRCUITPY_ESP_FLASH_MODE = dio
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CIRCUITPY_ESP_FLASH_FREQ = 80m
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CIRCUITPY_ESP_FLASH_SIZE = 8MB
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CIRCUITPY_DOTCLOCKFRAMEBUFFER = 1
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#include "py/objtuple.h"
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#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_obj_tuple_t tft_r_pins = {
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{&mp_type_tuple},
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5,
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{
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MP_ROM_PTR(&pin_GPIO14),
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MP_ROM_PTR(&pin_GPIO15),
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MP_ROM_PTR(&pin_GPIO16),
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MP_ROM_PTR(&pin_GPIO17),
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MP_ROM_PTR(&pin_GPIO18),
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}
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};
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STATIC const mp_rom_obj_tuple_t tft_g_pins = {
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{&mp_type_tuple},
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6,
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{
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MP_ROM_PTR(&pin_GPIO8),
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MP_ROM_PTR(&pin_GPIO9),
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MP_ROM_PTR(&pin_GPIO10),
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MP_ROM_PTR(&pin_GPIO11),
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MP_ROM_PTR(&pin_GPIO12),
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MP_ROM_PTR(&pin_GPIO13),
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}
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};
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STATIC const mp_rom_obj_tuple_t tft_b_pins = {
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{&mp_type_tuple},
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5,
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{
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MP_ROM_PTR(&pin_GPIO3),
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MP_ROM_PTR(&pin_GPIO4),
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MP_ROM_PTR(&pin_GPIO5),
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MP_ROM_PTR(&pin_GPIO6),
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MP_ROM_PTR(&pin_GPIO7),
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}
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};
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STATIC const mp_rom_map_elem_t tft_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO45) },
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{ MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO48) },
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{ MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO47) },
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{ MP_ROM_QSTR(MP_QSTR_dclk), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_red), MP_ROM_PTR(&tft_r_pins) },
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{ MP_ROM_QSTR(MP_QSTR_green), MP_ROM_PTR(&tft_g_pins) },
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{ MP_ROM_QSTR(MP_QSTR_blue), MP_ROM_PTR(&tft_b_pins) },
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};
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MP_DEFINE_CONST_DICT(tft_dict, tft_table);
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STATIC const mp_rom_map_elem_t timings800_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(6500000) }, // nominal 16MHz, but display is unstable/tears at that frequency
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{ MP_ROM_QSTR(MP_QSTR_width), MP_ROM_INT(800) },
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{ MP_ROM_QSTR(MP_QSTR_height), MP_ROM_INT(480) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_pulse_width), MP_ROM_INT(30) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_front_porch), MP_ROM_INT(210) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_back_porch), MP_ROM_INT(16) },
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{ MP_ROM_QSTR(MP_QSTR_hsync_idle_low), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_vsync_pulse_width), MP_ROM_INT(13) },
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{ MP_ROM_QSTR(MP_QSTR_vsync_front_porch), MP_ROM_INT(22) },
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{ MP_ROM_QSTR(MP_QSTR_vsync_back_porch), MP_ROM_INT(10) },
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{ MP_ROM_QSTR(MP_QSTR_vsync_idle_low), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_de_idle_high), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_pclk_active_high), MP_ROM_FALSE },
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{ MP_ROM_QSTR(MP_QSTR_pclk_idle_high), MP_ROM_FALSE },
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};
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MP_DEFINE_CONST_DICT(timings800_dict, timings800_table);
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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{ MP_ROM_QSTR(MP_QSTR_TFT), MP_ROM_PTR(&tft_dict) },
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{ MP_ROM_QSTR(MP_QSTR_TIMINGS800), MP_ROM_PTR(&timings800_dict) },
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{ MP_ROM_QSTR(MP_QSTR_BACKLIGHT), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_TFTB1), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_TFTB2), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_TFTB3), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_TFTB4), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_TFTB5), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_TFTG1), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_TFTG2), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_TFTG3), MP_ROM_PTR(&pin_GPIO10) },
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{ MP_ROM_QSTR(MP_QSTR_TFTG4), MP_ROM_PTR(&pin_GPIO11) },
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{ MP_ROM_QSTR(MP_QSTR_TFTG5), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_TFTG6), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_TFTR1), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_TFTR2), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_TFTR3), MP_ROM_PTR(&pin_GPIO16) },
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{ MP_ROM_QSTR(MP_QSTR_TFTR4), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_TFTR5), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_IO19), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_IO20), MP_ROM_PTR(&pin_GPIO20) },
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{ MP_ROM_QSTR(MP_QSTR_dclk), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
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{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
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{ MP_ROM_QSTR(MP_QSTR_IO39), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_IO40), MP_ROM_PTR(&pin_GPIO40) },
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{ MP_ROM_QSTR(MP_QSTR_IO41), MP_ROM_PTR(&pin_GPIO41) },
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{ MP_ROM_QSTR(MP_QSTR_IO42), MP_ROM_PTR(&pin_GPIO42) },
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{ MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO45) },
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{ MP_ROM_QSTR(MP_QSTR_IO46), MP_ROM_PTR(&pin_GPIO46) },
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{ MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO47) },
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{ MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO48) },
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{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO48) },
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
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{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
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#
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# Component config
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#
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#
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# ESP32S3-Specific
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#
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CONFIG_ESP32S3_SPIRAM_SUPPORT=y
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#
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# SPI RAM config
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#
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#CONFIG_SPIRAM_MODE_QUAD=y
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### NEW ###
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CONFIG_SPIRAM_MODE_OCT=y
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CONFIG_SPIRAM_TYPE_AUTO=y
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#######
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# CONFIG_SPIRAM_MODE_OCT is not set
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# CONFIG_SPIRAM_TYPE_AUTO is not set
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#CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
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# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
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#CONFIG_SPIRAM_SIZE=2097152
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CONFIG_SPIRAM_TYPE_ESPPSRAM64=y
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CONFIG_SPIRAM_SIZE=8388608
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#
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# PSRAM Clock and CS IO for ESP32S3
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#
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CONFIG_DEFAULT_PSRAM_CLK_IO=30
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CONFIG_DEFAULT_PSRAM_CS_IO=26
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# end of PSRAM Clock and CS IO for ESP32S3
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# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
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# CONFIG_SPIRAM_RODATA is not set
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# CONFIG_SPIRAM_SPEED_120M is not set
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CONFIG_SPIRAM_SPEED_80M=y
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# CONFIG_SPIRAM_SPEED_40M is not set
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_BOOT_INIT=y
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# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
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CONFIG_SPIRAM_USE_MEMMAP=y
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# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
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# CONFIG_SPIRAM_USE_MALLOC is not set
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CONFIG_SPIRAM_MEMTEST=y
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# end of SPI RAM config
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# end of ESP32S3-Specific
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#
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# LWIP
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#
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CONFIG_LWIP_LOCAL_HOSTNAME="espressif-esp32s3-hacktablet"
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# end of LWIP
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# CONFIG_ESP_CONSOLE_NONE is not set
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CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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CONFIG_ESP_CONSOLE_UART_NUM=0
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CONFIG_ESP_CONSOLE_UART_RX_GPIO=44
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CONFIG_ESP_CONSOLE_UART_TX_GPIO=43
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CONFIG_ESP_CONSOLE_UART=y
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# end of Component config
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@ -55,6 +55,7 @@ DEFAULT_CLUSTERLIST = {
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"espressif_esp32s3_devkitc_1_n8r2",
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"espressif_esp32s3_devkitc_1_n8r8",
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"espressif_esp32s3_devkitc_1_n32r8",
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"espressif_esp32s3_devkitc_1_n8r8_hacktablet",
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],
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"0x303A:0x7009": [
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"espressif_esp32s2_devkitc_1_n4",
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