py/inlinethumb: Remove 30-bit restriction on movwt instruction.
movwt can now move a full 32-bit constant into a register.
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@ -21,8 +21,7 @@ Where immediate values are used, these are zero-extended to 32 bits. Thus
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movt writes an immediate value to the top halfword of the destination register.
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It does not affect the contents of the bottom halfword.
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* movwt(Rd, imm30) ``Rd = imm30``
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* movwt(Rd, imm32) ``Rd = imm32``
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movwt is a pseudo-instruction: the MicroPython assembler emits a ``movw`` and a ``movt``
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to move a zero extended 30 bit value into Rd. Where the full 32 bits are required a
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workround is to use the movw and movt operations.
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movwt is a pseudo-instruction: the MicroPython assembler emits a ``movw`` followed
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by a ``movt`` to move a 32-bit value into Rd.
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@ -703,11 +703,10 @@ STATIC void emit_inline_thumb_op(emit_inline_asm_t *emit, qstr op, mp_uint_t n_a
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goto op_movw_movt;
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} else if (ARMV7M && strcmp(op_str, "movwt") == 0) {
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// this is a convenience instruction
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// we clear the MSB since it might be set from extracting the small int value
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mp_uint_t reg_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
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int i_src = get_arg_i(emit, op_str, pn_args[1], 0xffffffff);
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uint32_t i_src = get_arg_i(emit, op_str, pn_args[1], 0xffffffff);
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asm_thumb_mov_reg_i16(emit->as, ASM_THUMB_OP_MOVW, reg_dest, i_src & 0xffff);
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asm_thumb_mov_reg_i16(emit->as, ASM_THUMB_OP_MOVT, reg_dest, (i_src >> 16) & 0x7fff);
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asm_thumb_mov_reg_i16(emit->as, ASM_THUMB_OP_MOVT, reg_dest, (i_src >> 16) & 0xffff);
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} else if (ARMV7M && strcmp(op_str, "ldrex") == 0) {
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mp_uint_t r_dest = get_arg_reg(emit, op_str, pn_args[0], 15);
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mp_parse_node_t pn_base, pn_offset;
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8
tests/inlineasm/asmconst.py
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tests/inlineasm/asmconst.py
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@ -0,0 +1,8 @@
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# test constants in assembler
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@micropython.asm_thumb
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def c1():
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movwt(r0, 0xffffffff)
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movwt(r1, 0xf0000000)
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sub(r0, r0, r1)
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print(hex(c1()))
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1
tests/inlineasm/asmconst.py.exp
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1
tests/inlineasm/asmconst.py.exp
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@ -0,0 +1 @@
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0xfffffff
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