Remove debugging print for SD card; add comment to possibly-buggy USB code.

This commit is contained in:
Damien 2013-11-01 23:25:08 +00:00
parent c1764e997c
commit e8217c2a9b
3 changed files with 3 additions and 8 deletions

View File

@ -414,7 +414,6 @@ SD_Error SD_Init(void)
if (errorstatus != SD_OK)
{
printf("here1\n");
/*!< CMD Response TimeOut (wait for CMDSENT flag) */
return(errorstatus);
}
@ -423,7 +422,6 @@ SD_Error SD_Init(void)
if (errorstatus != SD_OK)
{
printf("here2\n");
/*!< CMD Response TimeOut (wait for CMDSENT flag) */
return(errorstatus);
}
@ -568,7 +566,6 @@ SD_Error SD_PowerON(void)
SDIO_SendCommand(&SDIO_CmdInitStructure);
errorstatus = CmdError();
printf("here pwr 1 %d\n", errorstatus);
if (errorstatus != SD_OK)
{
@ -590,7 +587,6 @@ SD_Error SD_PowerON(void)
SDIO_SendCommand(&SDIO_CmdInitStructure);
errorstatus = CmdResp7Error();
printf("here pwr 2 %d\n", errorstatus);
if (errorstatus == SD_OK)
{
@ -616,7 +612,6 @@ SD_Error SD_PowerON(void)
SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable;
SDIO_SendCommand(&SDIO_CmdInitStructure);
errorstatus = CmdResp1Error(SD_CMD_APP_CMD);
printf("here pwr 3 %d\n", errorstatus);
/*!< If errorstatus is Command TimeOut, it is a MMC card */
/*!< If errorstatus is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch)

View File

@ -1961,7 +1961,7 @@ void USB_OTG_ActiveRemoteWakeup(USB_OTG_CORE_HANDLE *pdev)
if(pdev->cfg.low_power)
{
/* un-gate USB Core clock */
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL); // dpgeorge: taking the address here might be wrong...
power.b.gatehclk = 0;
power.b.stoppclk = 0;
USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);
@ -1995,7 +1995,7 @@ void USB_OTG_UngateClock(USB_OTG_CORE_HANDLE *pdev)
if(dsts.b.suspsts == 1)
{
/* un-gate USB Core clock */
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL); // dpgeorge: taking the address here might be wrong...
power.b.gatehclk = 0;
power.b.stoppclk = 0;
USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);

View File

@ -352,7 +352,7 @@ static uint32_t DCD_HandleResume_ISR(USB_OTG_CORE_HANDLE *pdev)
if(pdev->cfg.low_power)
{
/* un-gate USB Core clock */
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL);
power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL); // dpgeorge: taking the address here might be wrong...
power.b.gatehclk = 0;
power.b.stoppclk = 0;
USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32);