stm32/boards/PYBD_SF2: Disable SPIFLASH_ENABLE_CACHE for mboot builds.
Mboot builds do not use the external SPI flash in caching mode, and explicitly disabling it saves RAM and a small bit of flash. Signed-off-by: Damien George <damien@micropython.org>
This commit is contained in:
parent
e43a74a4db
commit
e715a8fb9b
@ -27,8 +27,10 @@
|
||||
#include "storage.h"
|
||||
#include "qspi.h"
|
||||
|
||||
#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
|
||||
// Shared cache for first and second SPI block devices
|
||||
STATIC mp_spiflash_cache_t spi_bdev_cache;
|
||||
#endif
|
||||
|
||||
// First external SPI flash uses software QSPI interface
|
||||
|
||||
@ -45,7 +47,9 @@ const mp_spiflash_config_t spiflash_config = {
|
||||
.bus_kind = MP_SPIFLASH_BUS_QSPI,
|
||||
.bus.u_qspi.data = (void*)&soft_qspi_bus,
|
||||
.bus.u_qspi.proto = &mp_soft_qspi_proto,
|
||||
#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
|
||||
.cache = &spi_bdev_cache,
|
||||
#endif
|
||||
};
|
||||
|
||||
spi_bdev_t spi_bdev;
|
||||
@ -56,7 +60,9 @@ const mp_spiflash_config_t spiflash2_config = {
|
||||
.bus_kind = MP_SPIFLASH_BUS_QSPI,
|
||||
.bus.u_qspi.data = NULL,
|
||||
.bus.u_qspi.proto = &qspi_proto,
|
||||
#if MICROPY_HW_SPIFLASH_ENABLE_CACHE
|
||||
.cache = &spi_bdev_cache,
|
||||
#endif
|
||||
};
|
||||
|
||||
spi_bdev_t spi_bdev2;
|
||||
|
@ -77,7 +77,9 @@ void board_sleep(int value);
|
||||
// SPI flash #1, block device config
|
||||
extern const struct _mp_spiflash_config_t spiflash_config;
|
||||
extern struct _spi_bdev_t spi_bdev;
|
||||
#if !BUILDING_MBOOT
|
||||
#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
|
||||
#endif
|
||||
#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
|
||||
(op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
|
||||
(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
|
||||
|
Loading…
x
Reference in New Issue
Block a user