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Merge pull request #8401 from jepler/i2c-expander-init

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Fast(ish) special purpose bitbang spi over i2c
This commit is contained in:
Scott Shawcroft 2023-09-18 13:19:49 -07:00 committed by GitHub
commit e39fbf1b26
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GPG Key ID: 4AEE18F83AFDEB23
9 changed files with 393 additions and 30 deletions
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125
ports/espressif/boards/espressif_esp32s3_lcd_ev/board.c
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@ -26,9 +26,134 @@
#include "supervisor/board.h" #include "supervisor/board.h"
#include "mpconfigboard.h" #include "mpconfigboard.h"
#include "shared-bindings/board/__init__.h"
#include "shared-bindings/busio/I2C.h"
#include "shared-bindings/dotclockframebuffer/DotClockFramebuffer.h"
#include "shared-bindings/dotclockframebuffer/__init__.h"
#include "shared-bindings/framebufferio/FramebufferDisplay.h"
#include "shared-bindings/microcontroller/Pin.h" #include "shared-bindings/microcontroller/Pin.h"
#include "shared-module/displayio/__init__.h"
static const uint8_t display_init_sequence[] = {
0xf0, 5, 0x55, 0xaa, 0x52, 0x08, 0x00,
0xf6, 2, 0x5a, 0x87,
0xc1, 1, 0x3f,
0xc2, 1, 0x0e,
0xc6, 1, 0xf8,
0xc9, 1, 0x10,
0xcd, 1, 0x25,
0xf8, 1, 0x8a,
0xac, 1, 0x45,
0xa0, 1, 0xdd,
0xa7, 1, 0x47,
0xfa, 4, 0x00, 0x00, 0x00, 0x04,
0x86, 4, 0x99, 0xa3, 0xa3, 0x51,
0xa3, 1, 0xee,
0xfd, 3, 0x3c, 0x3c, 0x00,
0x71, 1, 0x48,
0x72, 1, 0x48,
0x73, 2, 0x00, 0x44,
0x97, 1, 0xee,
0x83, 1, 0x93,
0x9a, 1, 0x72,
0x9b, 1, 0x5a,
0x82, 2, 0x2c, 0x2c,
0xb1, 1, 0x10,
0x6d, 32, 0x00, 0x1f, 0x19, 0x1a, 0x10, 0x0e, 0x0c, 0x0a, 0x02, 0x07, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x08, 0x01, 0x09, 0x0b, 0x0d, 0x0f, 0x1a, 0x19, 0x1f, 0x00,
0x64, 16, 0x38, 0x05, 0x01, 0xdb, 0x03, 0x03, 0x38, 0x04, 0x01, 0xdc, 0x03, 0x03, 0x7a, 0x7a, 0x7a, 0x7a,
0x65, 16, 0x38, 0x03, 0x01, 0xdd, 0x03, 0x03, 0x38, 0x02, 0x01, 0xde, 0x03, 0x03, 0x7a, 0x7a, 0x7a, 0x7a,
0x66, 16, 0x38, 0x01, 0x01, 0xdf, 0x03, 0x03, 0x38, 0x00, 0x01, 0xe0, 0x03, 0x03, 0x7a, 0x7a, 0x7a, 0x7a,
0x67, 16, 0x30, 0x01, 0x01, 0xe1, 0x03, 0x03, 0x30, 0x02, 0x01, 0xe2, 0x03, 0x03, 0x7a, 0x7a, 0x7a, 0x7a,
0x68, 13, 0x00, 0x08, 0x15, 0x08, 0x15, 0x7a, 0x7a, 0x08, 0x15, 0x08, 0x15, 0x7a, 0x7a,
0x60, 8, 0x38, 0x08, 0x7a, 0x7a, 0x38, 0x09, 0x7a, 0x7a,
0x63, 8, 0x31, 0xe4, 0x7a, 0x7a, 0x31, 0xe5, 0x7a, 0x7a,
0x69, 7, 0x04, 0x22, 0x14, 0x22, 0x14, 0x22, 0x08,
0x6b, 1, 0x07,
0x7a, 2, 0x08, 0x13,
0x7b, 2, 0x08, 0x13,
0xd1, 52, 0x00, 0x00, 0x00, 0x04, 0x00, 0x12, 0x00, 0x18, 0x00, 0x21, 0x00, 0x2a, 0x00, 0x35, 0x00, 0x47, 0x00, 0x56, 0x00, 0x90, 0x00, 0xe5, 0x01, 0x68, 0x01, 0xd5, 0x01, 0xd7, 0x02, 0x36, 0x02, 0xa6, 0x02, 0xee, 0x03, 0x48, 0x03, 0xa0, 0x03, 0xba, 0x03, 0xc5, 0x03, 0xd0, 0x03, 0xe0, 0x03, 0xea, 0x03, 0xfa, 0x03, 0xff,
0xd2, 52, 0x00, 0x00, 0x00, 0x04, 0x00, 0x12, 0x00, 0x18, 0x00, 0x21, 0x00, 0x2a, 0x00, 0x35, 0x00, 0x47, 0x00, 0x56, 0x00, 0x90, 0x00, 0xe5, 0x01, 0x68, 0x01, 0xd5, 0x01, 0xd7, 0x02, 0x36, 0x02, 0xa6, 0x02, 0xee, 0x03, 0x48, 0x03, 0xa0, 0x03, 0xba, 0x03, 0xc5, 0x03, 0xd0, 0x03, 0xe0, 0x03, 0xea, 0x03, 0xfa, 0x03, 0xff,
0xd3, 52, 0x00, 0x00, 0x00, 0x04, 0x00, 0x12, 0x00, 0x18, 0x00, 0x21, 0x00, 0x2a, 0x00, 0x35, 0x00, 0x47, 0x00, 0x56, 0x00, 0x90, 0x00, 0xe5, 0x01, 0x68, 0x01, 0xd5, 0x01, 0xd7, 0x02, 0x36, 0x02, 0xa6, 0x02, 0xee, 0x03, 0x48, 0x03, 0xa0, 0x03, 0xba, 0x03, 0xc5, 0x03, 0xd0, 0x03, 0xe0, 0x03, 0xea, 0x03, 0xfa, 0x03, 0xff,
0xd4, 52, 0x00, 0x00, 0x00, 0x04, 0x00, 0x12, 0x00, 0x18, 0x00, 0x21, 0x00, 0x2a, 0x00, 0x35, 0x00, 0x47, 0x00, 0x56, 0x00, 0x90, 0x00, 0xe5, 0x01, 0x68, 0x01, 0xd5, 0x01, 0xd7, 0x02, 0x36, 0x02, 0xa6, 0x02, 0xee, 0x03, 0x48, 0x03, 0xa0, 0x03, 0xba, 0x03, 0xc5, 0x03, 0xd0, 0x03, 0xe0, 0x03, 0xea, 0x03, 0xfa, 0x03, 0xff,
0xd5, 52, 0x00, 0x00, 0x00, 0x04, 0x00, 0x12, 0x00, 0x18, 0x00, 0x21, 0x00, 0x2a, 0x00, 0x35, 0x00, 0x47, 0x00, 0x56, 0x00, 0x90, 0x00, 0xe5, 0x01, 0x68, 0x01, 0xd5, 0x01, 0xd7, 0x02, 0x36, 0x02, 0xa6, 0x02, 0xee, 0x03, 0x48, 0x03, 0xa0, 0x03, 0xba, 0x03, 0xc5, 0x03, 0xd0, 0x03, 0xe0, 0x03, 0xea, 0x03, 0xfa, 0x03, 0xff,
0xd6, 52, 0x00, 0x00, 0x00, 0x04, 0x00, 0x12, 0x00, 0x18, 0x00, 0x21, 0x00, 0x2a, 0x00, 0x35, 0x00, 0x47, 0x00, 0x56, 0x00, 0x90, 0x00, 0xe5, 0x01, 0x68, 0x01, 0xd5, 0x01, 0xd7, 0x02, 0x36, 0x02, 0xa6, 0x02, 0xee, 0x03, 0x48, 0x03, 0xa0, 0x03, 0xba, 0x03, 0xc5, 0x03, 0xd0, 0x03, 0xe0, 0x03, 0xea, 0x03, 0xfa, 0x03, 0xff,
0x3a, 1, 0x66,
0x3a, 1, 0x66,
0x11, 0x80, 120,
0x29, 0x0
};
static const mcu_pin_obj_t *red_pins[] = {
&pin_GPIO1, &pin_GPIO2, &pin_GPIO42, &pin_GPIO41, &pin_GPIO40
};
static const mcu_pin_obj_t *green_pins[] = {
&pin_GPIO21, &pin_GPIO47, &pin_GPIO48, &pin_GPIO45, &pin_GPIO38, &pin_GPIO39
};
static const mcu_pin_obj_t *blue_pins[] = {
&pin_GPIO10, &pin_GPIO11, &pin_GPIO12, &pin_GPIO13, &pin_GPIO14
};
void board_init(void) { void board_init(void) {
dotclockframebuffer_framebuffer_obj_t *framebuffer = &allocate_display_bus_or_raise()->dotclock;
framebuffer->base.type = &dotclockframebuffer_framebuffer_type;
common_hal_dotclockframebuffer_framebuffer_construct(
framebuffer,
/* de */ &pin_GPIO17,
/* vsync */ &pin_GPIO3,
/* hsync */ &pin_GPIO46,
/* dclk */ &pin_GPIO9,
/* data */ red_pins, MP_ARRAY_SIZE(red_pins), green_pins, MP_ARRAY_SIZE(green_pins), blue_pins, MP_ARRAY_SIZE(blue_pins),
/* frequency */ 6500000,
/* width x height */ 480, 480,
/* horizontal: pulse, back & front porch, idle */ 13, 20, 40, false,
/* vertical: pulse, back & front porch, idle */ 15, 20, 40, false,
/* de_idle_high */ false,
/* pclk_active_high */ true,
/* pclk_idle_high */ false,
/* overscan_left */ 0
);
framebufferio_framebufferdisplay_obj_t *disp = &allocate_display_or_raise()->framebuffer_display;
disp->base.type = &framebufferio_framebufferdisplay_type;
common_hal_framebufferio_framebufferdisplay_construct(
disp,
framebuffer,
0,
true
);
busio_i2c_obj_t i2c;
i2c.base.type = &busio_i2c_type;
common_hal_busio_i2c_construct(&i2c, DEFAULT_I2C_BUS_SCL, DEFAULT_I2C_BUS_SDA, 400000, 255);
const int i2c_device_address = 32;
common_hal_busio_i2c_try_lock(&i2c);
{
uint8_t buf[2] = {3, 0xf1}; // set GPIO direction
common_hal_busio_i2c_write(&i2c, i2c_device_address, buf, sizeof(buf));
}
{
uint8_t buf[2] = {2, 0}; // set all output pins low initially
common_hal_busio_i2c_write(&i2c, i2c_device_address, buf, sizeof(buf));
}
common_hal_busio_i2c_unlock(&i2c);
dotclockframebuffer_ioexpander_spi_bus spibus = {
.bus = &i2c,
.i2c_device_address = i2c_device_address,
.i2c_write_size = 2,
.addr_reg_shadow = { .u32 = 1 }, // GPIO data at register 1
.cs_mask = 0x100 << 1, // data payload is at byte 2
.mosi_mask = 0x100 << 3,
.clk_mask = 0x100 << 2,
};
dotclockframebuffer_ioexpander_send_init_sequence(&spibus, display_init_sequence, sizeof(display_init_sequence));
common_hal_busio_i2c_deinit(&i2c);
} }
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. // Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.

62
ports/espressif/boards/espressif_esp32s3_lcd_ev/pins.c
View File

@ -1,15 +1,16 @@
#include "py/objtuple.h" #include "py/objtuple.h"
#include "shared-bindings/board/__init__.h" #include "shared-bindings/board/__init__.h"
#include "shared-module/displayio/__init__.h"
STATIC const mp_rom_obj_tuple_t tft_r_pins = { STATIC const mp_rom_obj_tuple_t tft_r_pins = {
{&mp_type_tuple}, {&mp_type_tuple},
5, 5,
{ {
MP_ROM_PTR(&pin_GPIO10), MP_ROM_PTR(&pin_GPIO1),
MP_ROM_PTR(&pin_GPIO11), MP_ROM_PTR(&pin_GPIO2),
MP_ROM_PTR(&pin_GPIO12), MP_ROM_PTR(&pin_GPIO42),
MP_ROM_PTR(&pin_GPIO13), MP_ROM_PTR(&pin_GPIO41),
MP_ROM_PTR(&pin_GPIO14), MP_ROM_PTR(&pin_GPIO40),
} }
}; };
@ -30,35 +31,53 @@ STATIC const mp_rom_obj_tuple_t tft_b_pins = {
{&mp_type_tuple}, {&mp_type_tuple},
5, 5,
{ {
MP_ROM_PTR(&pin_GPIO40), MP_ROM_PTR(&pin_GPIO10),
MP_ROM_PTR(&pin_GPIO41), MP_ROM_PTR(&pin_GPIO11),
MP_ROM_PTR(&pin_GPIO42), MP_ROM_PTR(&pin_GPIO12),
MP_ROM_PTR(&pin_GPIO2), MP_ROM_PTR(&pin_GPIO13),
MP_ROM_PTR(&pin_GPIO1), MP_ROM_PTR(&pin_GPIO14),
} }
}; };
STATIC const mp_rom_map_elem_t tft_table[] = { STATIC const mp_rom_map_elem_t tft_pins_table[] = {
{ MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO17) }, { MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO17) },
{ MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO46) }, { MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO3) },
{ MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO3) }, { MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO46) },
{ MP_ROM_QSTR(MP_QSTR_dclk), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_dclk), MP_ROM_PTR(&pin_GPIO9) },
{ MP_ROM_QSTR(MP_QSTR_red), MP_ROM_PTR(&tft_r_pins) }, { MP_ROM_QSTR(MP_QSTR_red), MP_ROM_PTR(&tft_r_pins) },
{ MP_ROM_QSTR(MP_QSTR_green), MP_ROM_PTR(&tft_g_pins) }, { MP_ROM_QSTR(MP_QSTR_green), MP_ROM_PTR(&tft_g_pins) },
{ MP_ROM_QSTR(MP_QSTR_blue), MP_ROM_PTR(&tft_b_pins) }, { MP_ROM_QSTR(MP_QSTR_blue), MP_ROM_PTR(&tft_b_pins) },
{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(9000000) },
}; };
MP_DEFINE_CONST_DICT(tft_dict, tft_table); MP_DEFINE_CONST_DICT(tft_pins_dict, tft_pins_table);
STATIC const mp_rom_map_elem_t tft_timings_table[] = {
{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(6500000) }, // nominal 16MHz, but display is unstable/tears at that frequency
{ MP_ROM_QSTR(MP_QSTR_width), MP_ROM_INT(480) },
{ MP_ROM_QSTR(MP_QSTR_height), MP_ROM_INT(480) },
{ MP_ROM_QSTR(MP_QSTR_hsync_pulse_width), MP_ROM_INT(13) },
{ MP_ROM_QSTR(MP_QSTR_hsync_front_porch), MP_ROM_INT(20) },
{ MP_ROM_QSTR(MP_QSTR_hsync_back_porch), MP_ROM_INT(40) },
{ MP_ROM_QSTR(MP_QSTR_hsync_idle_low), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_vsync_pulse_width), MP_ROM_INT(15) },
{ MP_ROM_QSTR(MP_QSTR_vsync_front_porch), MP_ROM_INT(20) },
{ MP_ROM_QSTR(MP_QSTR_vsync_back_porch), MP_ROM_INT(40) },
{ MP_ROM_QSTR(MP_QSTR_vsync_idle_low), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_de_idle_high), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_pclk_active_high), MP_ROM_FALSE },
{ MP_ROM_QSTR(MP_QSTR_pclk_idle_high), MP_ROM_FALSE },
};
MP_DEFINE_CONST_DICT(tft_timings_dict, tft_timings_table);
STATIC const mp_rom_map_elem_t board_module_globals_table[] = { STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
{ MP_ROM_QSTR(MP_QSTR_TFT), MP_ROM_PTR(&tft_dict) }, { MP_ROM_QSTR(MP_QSTR_TFT_PINS), MP_ROM_PTR(&tft_pins_dict) },
{ MP_ROM_QSTR(MP_QSTR_BACKLIGHT), MP_ROM_PTR(&pin_GPIO10) }, { MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS), MP_ROM_PTR(&tft_timings_dict) },
{ MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_GPIO16) },
{ MP_ROM_QSTR(MP_QSTR_I2S_MCLK), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_I2S_WS), MP_ROM_PTR(&pin_GPIO7) }, { MP_ROM_QSTR(MP_QSTR_I2S_WS), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_I2S_SDO), MP_ROM_PTR(&pin_GPIO15) }, { MP_ROM_QSTR(MP_QSTR_I2S_SDO), MP_ROM_PTR(&pin_GPIO6) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
@ -66,14 +85,11 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(DEFAULT_I2C_BUS_SCL) }, { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(DEFAULT_I2C_BUS_SCL) },
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(DEFAULT_I2C_BUS_SDA) }, { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(DEFAULT_I2C_BUS_SDA) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO13) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO12) },
// boot mode button can be used in SW as well // boot mode button can be used in SW as well
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) }, { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
}; };
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

8
ports/espressif/boards/makerfabs_tft7/pins.c
View File

@ -38,7 +38,7 @@ STATIC const mp_rom_obj_tuple_t tft_b_pins = {
} }
}; };
STATIC const mp_rom_map_elem_t tft_table[] = { STATIC const mp_rom_map_elem_t tft_pins_table[] = {
{ MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO40) }, { MP_ROM_QSTR(MP_QSTR_de), MP_ROM_PTR(&pin_GPIO40) },
{ MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO41) }, { MP_ROM_QSTR(MP_QSTR_vsync), MP_ROM_PTR(&pin_GPIO41) },
{ MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO39) }, { MP_ROM_QSTR(MP_QSTR_hsync), MP_ROM_PTR(&pin_GPIO39) },
@ -47,7 +47,7 @@ STATIC const mp_rom_map_elem_t tft_table[] = {
{ MP_ROM_QSTR(MP_QSTR_green), MP_ROM_PTR(&tft_g_pins) }, { MP_ROM_QSTR(MP_QSTR_green), MP_ROM_PTR(&tft_g_pins) },
{ MP_ROM_QSTR(MP_QSTR_blue), MP_ROM_PTR(&tft_b_pins) }, { MP_ROM_QSTR(MP_QSTR_blue), MP_ROM_PTR(&tft_b_pins) },
}; };
MP_DEFINE_CONST_DICT(tft_dict, tft_table); MP_DEFINE_CONST_DICT(tft_pins_dict, tft_pins_table);
STATIC const mp_rom_map_elem_t timings800_table[] = { STATIC const mp_rom_map_elem_t timings800_table[] = {
{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(6500000) }, // nominal 16MHz, but display is unstable/tears at that frequency { MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_INT(6500000) }, // nominal 16MHz, but display is unstable/tears at that frequency
@ -70,8 +70,8 @@ MP_DEFINE_CONST_DICT(timings800_dict, timings800_table);
STATIC const mp_rom_map_elem_t board_module_globals_table[] = { STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
{ MP_ROM_QSTR(MP_QSTR_TFT), MP_ROM_PTR(&tft_dict) }, { MP_ROM_QSTR(MP_QSTR_TFT_PINS), MP_ROM_PTR(&tft_pins_dict) },
{ MP_ROM_QSTR(MP_QSTR_TIMINGS800), MP_ROM_PTR(&timings800_dict) }, { MP_ROM_QSTR(MP_QSTR_TFT_TIMINGS_800x480), MP_ROM_PTR(&timings800_dict) },
{ MP_ROM_QSTR(MP_QSTR_BACKLIGHT), MP_ROM_PTR(&pin_GPIO10) }, { MP_ROM_QSTR(MP_QSTR_BACKLIGHT), MP_ROM_PTR(&pin_GPIO10) },
{ MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_GPIO20) }, { MP_ROM_QSTR(MP_QSTR_I2S_SCK), MP_ROM_PTR(&pin_GPIO20) },

23
py/argcheck.c
View File

@ -133,7 +133,28 @@ void mp_arg_parse_all(size_t n_pos, const mp_obj_t *pos, mp_map_t *kws, size_t n
#if MICROPY_ERROR_REPORTING <= MICROPY_ERROR_REPORTING_TERSE #if MICROPY_ERROR_REPORTING <= MICROPY_ERROR_REPORTING_TERSE
mp_arg_error_terse_mismatch(); mp_arg_error_terse_mismatch();
#else #else
// TODO better error message #if CIRCUITPY_FULL_BUILD
mp_map_elem_t *elem = kws->table;
size_t alloc = kws->alloc;
for (size_t i = 0; i < alloc; i++) {
mp_obj_t key = elem[i].key;
if (key == MP_OBJ_NULL) {
continue;
}
bool seen = false;
for (size_t j = n_pos; j < n_allowed; j++) {
if (mp_obj_equal(MP_OBJ_NEW_QSTR(allowed[j].qst), key)) {
seen = true;
break;
}
}
if (!seen) {
mp_raise_msg_varg(&mp_type_TypeError,
MP_ERROR_TEXT("unexpected keyword argument '%q'"), mp_obj_str_get_qstr(key));
}
}
#endif
// (for the !FULL_BUILD case, and as a fallthrough for the FULL_BUILD case, even though it SHOULD be unreachable in that case)
mp_raise_TypeError(MP_ERROR_TEXT("extra keyword arguments given")); mp_raise_TypeError(MP_ERROR_TEXT("extra keyword arguments given"));
#endif #endif
} }

1
py/circuitpy_defns.mk
View File

@ -603,6 +603,7 @@ SRC_SHARED_MODULE_ALL = \
displayio/TileGrid.c \ displayio/TileGrid.c \
displayio/area.c \ displayio/area.c \
displayio/__init__.c \ displayio/__init__.c \
dotclockframebuffer/__init__.c \
floppyio/__init__.c \ floppyio/__init__.c \
fontio/BuiltinFont.c \ fontio/BuiltinFont.c \
fontio/__init__.c \ fontio/__init__.c \

2
shared-bindings/dotclockframebuffer/DotClockFramebuffer.c
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@ -166,8 +166,6 @@ STATIC mp_obj_t dotclockframebuffer_framebuffer_make_new(const mp_obj_type_t *ty
validate_list_is_free_pins(MP_QSTR_green, green_pins, (mp_int_t)MP_ARRAY_SIZE(green_pins), args[ARG_green].u_obj, &num_green); validate_list_is_free_pins(MP_QSTR_green, green_pins, (mp_int_t)MP_ARRAY_SIZE(green_pins), args[ARG_green].u_obj, &num_green);
validate_list_is_free_pins(MP_QSTR_blue, blue_pins, (mp_int_t)MP_ARRAY_SIZE(blue_pins), args[ARG_blue].u_obj, &num_blue); validate_list_is_free_pins(MP_QSTR_blue, blue_pins, (mp_int_t)MP_ARRAY_SIZE(blue_pins), args[ARG_blue].u_obj, &num_blue);
mp_printf(&mp_plat_print, "#red=%d #green=%d #blue=%d\n", num_red, num_green, num_blue);
dotclockframebuffer_framebuffer_obj_t *self = &allocate_display_bus_or_raise()->dotclock; dotclockframebuffer_framebuffer_obj_t *self = &allocate_display_bus_or_raise()->dotclock;
self->base.type = &dotclockframebuffer_framebuffer_type; self->base.type = &dotclockframebuffer_framebuffer_type;

93
shared-bindings/dotclockframebuffer/__init__.c
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@ -34,11 +34,104 @@
#include "shared-bindings/dotclockframebuffer/DotClockFramebuffer.h" #include "shared-bindings/dotclockframebuffer/DotClockFramebuffer.h"
//| """Native helpers for driving parallel displays""" //| """Native helpers for driving parallel displays"""
//|
//| Length = typing.Literal[1, 2]
//|
//| def ioexpander_send_init_sequence(
//| bus: busio.I2C,
//| i2c_address: int,
//| reg_addr: int,
//| gpio_data_len: Length,
//| gpio_address: int,
//| gpio_data: int,
//| cs_bit: int,
//| mosi_bit: int,
//| clk_bit: int,
//| init_sequence: ReadableBuffer,
//| ):
//| """Send a displayio-style initialization sequence over an I2C I/O expander
//|
//| This function is highly generic in order to support various I/O expanders.
//| What's assumed is that all the GPIO can be updated by writing to a single I2C register.
//| Normal output polarity is assumed (CS and CLK are active low, data is not inverted).
//| Only 8-bit I2C addresses are supported.
//| 8- and 16-bit I2C addresses and data registers are supported.
//| The Data/Command bit is sent as part of the serial data.
//|
//| Normally this function is used via a convenience library that is specific to the display & I/O expander in use.
//|
//| :param busio.I2C bus: The I2C bus where the I/O expander resides
//| :param busio.i2c_address: int: The I2C bus address of the I/O expander
//| :param int gpio_address: The address portion of the I2C transaction (1 byte)
//| :param int gpio_data_len: The size of the data portion of the I2C transaction, 1 or 2 bytes
//| :param int gpio_data: The output value for all GPIO bits other than cs, mosi, and clk (needed because GPIO expanders may be unable to read back the current output value)
//| :param int cs_bit: The bit number (from 0 to 7, or from 0 to 15) of the chip select bit in the GPIO register
//| :param int mosi_value: The bit number (from 0 to 7, or from 0 to 15) of the data out bit in the GPIO register
//| :param int clk_value: The bit number (from 0 to 7, or from 0 to 15) of the clock out bit in the GPIO register
//| """
//|
STATIC mp_obj_t ioexpander_send_init_sequence(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
enum { ARG_bus, ARG_i2c_address, ARG_gpio_address, ARG_gpio_data_len, ARG_gpio_data, ARG_cs_bit, ARG_mosi_bit, ARG_clk_bit, ARG_init_sequence, NUM_ARGS };
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_bus, MP_ARG_REQUIRED | MP_ARG_OBJ },
{ MP_QSTR_i2c_address, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_gpio_address, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_gpio_data_len, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_gpio_data, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_cs_bit, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_mosi_bit, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_clk_bit, MP_ARG_REQUIRED | MP_ARG_INT },
{ MP_QSTR_init_sequence, MP_ARG_REQUIRED | MP_ARG_OBJ },
};
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
MP_STATIC_ASSERT(MP_ARRAY_SIZE(allowed_args) == NUM_ARGS);
mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
mp_obj_t bus_obj = mp_arg_validate_type(args[ARG_bus].u_obj, &busio_i2c_type, MP_QSTR_bus);
mp_int_t i2c_address = args[ARG_i2c_address].u_int;
mp_int_t gpio_address = args[ARG_gpio_address].u_int;
mp_int_t gpio_data_len = args[ARG_gpio_data_len].u_int;
mp_int_t gpio_data = args[ARG_gpio_data].u_int;
mp_int_t cs_bit = args[ARG_cs_bit].u_int;
mp_int_t mosi_bit = args[ARG_mosi_bit].u_int;
mp_int_t clk_bit = args[ARG_clk_bit].u_int;
mp_buffer_info_t bufinfo;
mp_get_buffer_raise(args[ARG_init_sequence].u_obj, &bufinfo, MP_BUFFER_READ);
mp_arg_validate_int_range(i2c_address, 0, 127, MP_QSTR_i2c_address);
mp_arg_validate_int_range(gpio_data_len, 1, 2, MP_QSTR_gpio_dat_len);
int max_bit = gpio_data_len * 8 - 1;
mp_arg_validate_int_range(cs_bit, 0, max_bit, MP_QSTR_cs_bit);
mp_arg_validate_int_range(mosi_bit, 0, max_bit, MP_QSTR_mosi_bit);
mp_arg_validate_int_range(clk_bit, 0, max_bit, MP_QSTR_clk_bit);
mp_arg_validate_int_range(gpio_data, 0, (1 << (max_bit * 8)) - 1, MP_QSTR_gpio_data);
dotclockframebuffer_ioexpander_spi_bus b = {
.bus = bus_obj,
.i2c_device_address = i2c_address,
.i2c_write_size = 1 + gpio_data_len,
// ASSERT(LITTLE_ENDIAN, "don't have to differentiate 8- vs 16-bits here")
.addr_reg_shadow = { .u32 = gpio_address | (gpio_data << 8) },
.cs_mask = 0x100 << cs_bit,
.mosi_mask = 0x100 << mosi_bit,
.clk_mask = 0x100 << clk_bit,
};
dotclockframebuffer_ioexpander_send_init_sequence(&b, bufinfo.buf, bufinfo.len);
return mp_const_none;
}
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(ioexpander_send_init_sequence_obj, 0, ioexpander_send_init_sequence);
STATIC const mp_rom_map_elem_t dotclockframebuffer_module_globals_table[] = { STATIC const mp_rom_map_elem_t dotclockframebuffer_module_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_dotclockframebuffer) }, { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_dotclockframebuffer) },
{ MP_ROM_QSTR(MP_QSTR_DotClockFramebuffer), MP_ROM_PTR(&dotclockframebuffer_framebuffer_type) }, { MP_ROM_QSTR(MP_QSTR_DotClockFramebuffer), MP_ROM_PTR(&dotclockframebuffer_framebuffer_type) },
{ MP_ROM_QSTR(MP_QSTR_ioexpander_send_init_sequence), MP_ROM_PTR(&ioexpander_send_init_sequence_obj) },
}; };
STATIC MP_DEFINE_CONST_DICT(dotclockframebuffer_module_globals, dotclockframebuffer_module_globals_table); STATIC MP_DEFINE_CONST_DICT(dotclockframebuffer_module_globals, dotclockframebuffer_module_globals_table);

29
shared-bindings/dotclockframebuffer/__init__.h
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@ -25,3 +25,32 @@
*/ */
#pragma once #pragma once
#include "py/obj.h"
#include "shared-bindings/busio/I2C.h"
typedef union {
struct {
uint8_t addr, data;
} a8d8;
struct {
uint16_t addr, data; // in little endian
} a16d16;
struct {
uint8_t addr;
uint16_t data; // in little endian
} __attribute__((packed)) a8d16;
uint32_t u32;
} dotclockframebuffer_ioexpander_addr_reg_t;
typedef struct {
busio_i2c_obj_t *bus;
uint8_t i2c_device_address;
uint8_t i2c_write_size;
dotclockframebuffer_ioexpander_addr_reg_t addr_reg_shadow;
uint32_t cs_mask;
uint32_t mosi_mask;
uint32_t clk_mask;
} dotclockframebuffer_ioexpander_spi_bus;
void dotclockframebuffer_ioexpander_send_init_sequence(dotclockframebuffer_ioexpander_spi_bus *bus, const uint8_t *init_sequence, uint16_t init_sequence_len);

80
shared-module/dotclockframebuffer/__init__.c Normal file
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@ -0,0 +1,80 @@
#include "shared-bindings/dotclockframebuffer/__init__.h"
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#define DELAY (0x80)
static void pin_change(dotclockframebuffer_ioexpander_spi_bus *bus, uint32_t set_bits, uint32_t clear_bits) {
uint32_t data = (bus->addr_reg_shadow.u32 & ~clear_bits) | set_bits;
// no way to signal failure to caller!
(void)common_hal_busio_i2c_write(bus->bus, bus->i2c_device_address, (uint8_t *)&data, bus->i2c_write_size);
bus->addr_reg_shadow.u32 = data;
}
static void ioexpander_bus_send(dotclockframebuffer_ioexpander_spi_bus *bus,
bool is_command,
const uint8_t *data, uint32_t data_length) {
int dc_mask = is_command ? 0 : 0x100;
for (uint32_t i = 0; i < data_length; i++) {
int bits = data[i] | dc_mask;
for (uint32_t j = 0; j < 9; j++) {
// CPOL=CPHA=0: output fresh data on falling edge of clk or cs
if (bits & 0x100) {
pin_change(bus, /* set */ bus->mosi_mask, /* clear */ bus->clk_mask | bus->cs_mask);
} else {
pin_change(bus, /* set */ 0, /* clear */ bus->mosi_mask | bus->clk_mask | bus->cs_mask);
}
// Display latches bit on rising edge of CLK
pin_change(bus, /* set */ bus->clk_mask, /* clear */ 0);
// next bit
bits <<= 1;
}
}
}
// Send a circuitpython-style display initialization sequence over an i2c-attached bus expander
// This always assumes
// * 9-bit SPI (no DC pin)
// * CPOL=CPHA=0
// * CS deasserted after each init sequence step, but not otherwise just like
// displayio fourwire bus without data_as_commands
void dotclockframebuffer_ioexpander_send_init_sequence(dotclockframebuffer_ioexpander_spi_bus *bus, const uint8_t *init_sequence, uint16_t init_sequence_len) {
while (!common_hal_busio_i2c_try_lock(bus->bus)) {
RUN_BACKGROUND_TASKS;
}
// ensure deasserted CS and idle CLK
pin_change(bus, /* set */ bus->cs_mask, /* clear */ bus->clk_mask);
for (uint32_t i = 0; i < init_sequence_len; /* NO INCREMENT */) {
const uint8_t *cmd = init_sequence + i;
uint8_t data_size = *(cmd + 1);
bool delay = (data_size & DELAY) != 0;
data_size &= ~DELAY;
const uint8_t *data = cmd + 2;
ioexpander_bus_send(bus, true, cmd, 1);
ioexpander_bus_send(bus, false, data, data_size);
// idle CLK
pin_change(bus, 0, /* clear */ bus->clk_mask);
// deassert CS
pin_change(bus, /* set */ bus->cs_mask, 0);
if (delay) {
data_size++;
uint16_t delay_length_ms = *(cmd + 1 + data_size);
if (delay_length_ms == 255) {
delay_length_ms = 500;
}
mp_hal_delay_ms(delay_length_ms);
}
i += 2 + data_size;
}
common_hal_busio_i2c_unlock(bus->bus);
}