update idf to v4.3
- update idf submodule to release/v4.3 - finish todo tasks held due to idf@v4.2 - update SPI & I2C to make them v4.3 compatible
This commit is contained in:
microDev
parent
47a6b13d63
commit
e0eecd2f76
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@ -153,6 +153,7 @@
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[submodule "ports/esp32s2/esp-idf"]
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path = ports/esp32s2/esp-idf
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url = https://github.com/adafruit/esp-idf.git
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branch = circuitpython-v4.3
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[submodule "ports/esp32s2/certificates/nina-fw"]
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path = ports/esp32s2/certificates/nina-fw
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url = https://github.com/adafruit/nina-fw.git
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@ -1997,6 +1997,10 @@ msgstr ""
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msgid "SPI Re-initialization error"
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msgstr ""
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#: ports/esp32s2/common-hal/busio/SPI.c
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msgid "SPI configuration failed"
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msgstr ""
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#: ports/raspberrypi/common-hal/busio/SPI.c
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msgid "SPI peripheral in use"
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msgstr ""
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@ -38,8 +38,10 @@ PORT ?= /dev/tty.SLAB_USBtoUART
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BUILD ?= build-$(BOARD)
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include ../../py/mkenv.mk
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# Board-specific
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include boards/$(BOARD)/mpconfigboard.mk
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# Port-specific
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include mpconfigport.mk
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@ -64,51 +66,52 @@ CROSS_COMPILE = xtensa-esp32s2-elf-
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#######################################
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INC += -I.
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INC += -I../..
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INC += -I$(BUILD)
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INC += -I$(BUILD)/genhdr
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INC += -I./boards
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INC += -I./boards/$(BOARD)
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INC += -I./peripherals
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INC += -I../..
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INC += -I../../lib/mp-readline
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INC += -I../../lib/tinyusb/src
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INC += -I../../supervisor/shared/usb
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INC += -I$(BUILD)
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INC += -I$(BUILD)/genhdr
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INC += -I$(BUILD)/esp-idf/config
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INC += -isystem esp-idf
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INC += -isystem esp-idf/components/app_update/include
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INC += -isystem esp-idf/components/bootloader_support/include
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INC += -isystem esp-idf/components/driver/esp32s2/include
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INC += -isystem esp-idf/components/driver/include
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INC += -isystem esp-idf/components/freertos/include/freertos
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INC += -isystem esp-idf/components/freertos/xtensa/include
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INC += -isystem esp-idf/components/esp32s2/include
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INC += -isystem esp-idf/components/xtensa/esp32s2/include
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INC += -isystem esp-idf/components/esp_common/include
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INC += -isystem esp-idf/components/esp_event/include
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INC += -isystem esp-idf/components/esp_hw_support/include
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INC += -isystem esp-idf/components/esp_netif/include
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INC += -isystem esp-idf/components/esp_pm/include
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INC += -isystem esp-idf/components/esp_ringbuf/include
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INC += -isystem esp-idf/components/esp_rom/include
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INC += -isystem esp-idf/components/esp_wifi/include
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INC += -isystem esp-idf/components/xtensa/include
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INC += -isystem esp-idf/components/esp_system/include
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INC += -isystem esp-idf/components/esp_timer/include
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INC += -isystem esp-idf/components/mbedtls/mbedtls/include
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INC += -isystem esp-idf/components/mbedtls/port/include/
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INC += -isystem esp-idf/components/newlib/platform_include
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INC += -isystem esp-idf/components/esp_wifi/include
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INC += -isystem esp-idf/components/freertos/include
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INC += -isystem esp-idf/components/freertos/include/freertos
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INC += -isystem esp-idf/components/freertos/port/xtensa/include
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INC += -isystem esp-idf/components/hal/include
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INC += -isystem esp-idf/components/hal/esp32s2/include
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INC += -isystem esp-idf/components/heap/include
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INC += -isystem esp-idf/components/log/include/
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INC += -isystem esp-idf/components/lwip/lwip/src/include
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INC += -isystem esp-idf/components/lwip/port/esp32/include
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INC += -isystem esp-idf/components/lwip/include/apps/sntp
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INC += -isystem esp-idf/components/hal/include
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INC += -isystem esp-idf/components/hal/esp32s2/include
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INC += -isystem esp-idf/components/log/include/
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INC += -isystem esp-idf/components/driver/esp32s2/include
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INC += -isystem esp-idf/components/soc/include
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INC += -isystem esp-idf/components/soc/src/esp32s2/include
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INC += -isystem esp-idf/components/soc/soc/include
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INC += -isystem esp-idf/components/soc/soc/esp32s2/include
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INC += -isystem esp-idf/components/heap/include
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INC += -isystem esp-idf/components/esp_system/include
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INC += -isystem esp-idf/components/spi_flash/include
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INC += -isystem esp-idf/components/mbedtls/mbedtls/include
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INC += -isystem esp-idf/components/mbedtls/port/include/
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INC += -isystem esp-idf/components/newlib/platform_include
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INC += -isystem esp-idf/components/nvs_flash/include
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INC += -isystem esp-idf/components/app_update/include
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INC += -isystem esp-idf/components/bootloader_support/include
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INC += -I$(BUILD)/esp-idf/config
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INC += -isystem esp-idf/components/soc/include
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INC += -isystem esp-idf/components/soc/esp32s2/include
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INC += -isystem esp-idf/components/spi_flash/include
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INC += -isystem esp-idf/components/xtensa/esp32s2/include
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INC += -isystem esp-idf/components/xtensa/include
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CFLAGS += -DHAVE_CONFIG_H \
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-DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" \
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@ -136,28 +139,29 @@ CFLAGS += $(OPTIMIZATION_FLAGS)
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CFLAGS += $(INC) -Werror -Wall -mlongcalls -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
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LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref -Wl,--undefined=uxTopUsedPriority
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LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref -Wl,--undefined=uxTopUsedPriority
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LDFLAGS += -L$(BUILD)/esp-idf/esp-idf/esp32s2 \
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-Tesp32s2_out.ld \
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-L$(BUILD)/esp-idf/esp-idf/esp32s2/ld \
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-Tesp32s2.project.ld \
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-Lesp-idf/components/esp32s2/ld \
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-Tesp32s2.peripherals.ld \
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-Lesp-idf/components/esp_rom/esp32s2/ld \
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-Tesp32s2.rom.ld \
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-Tesp32s2.rom.libgcc.ld \
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-Tesp32s2.rom.newlib-data.ld \
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-Tesp32s2.rom.newlib-funcs.ld \
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-Tesp32s2.rom.spiflash.ld
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-L$(BUILD)/esp-idf/esp-idf/esp32s2/ld \
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-Lesp-idf/components/esp32s2/ld \
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-Lesp-idf/components/esp_rom/esp32s2/ld \
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-Tesp32s2_out.ld \
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-Tesp32s2.project.ld \
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-Tesp32s2.peripherals.ld \
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-Tesp32s2.rom.ld \
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-Tesp32s2.rom.api.ld \
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-Tesp32s2.rom.libgcc.ld \
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-Tesp32s2.rom.newlib-data.ld \
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-Tesp32s2.rom.newlib-funcs.ld \
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-Tesp32s2.rom.spiflash.ld
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LDFLAGS += -Wl,-Bstatic \
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-Wl,--no-warn-mismatch \
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-Wl,--build-id=none \
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-fno-rtti
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LIBS := -lgcc -lc -lstdc++
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#
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LDFLAGS += -Wl,-Bstatic \
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-Wl,--no-warn-mismatch \
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-Wl,--build-id=none \
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-fno-rtti
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# Use toolchain libm if we're not using our own.
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ifndef INTERNAL_LIBM
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LIBS += -lm
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@ -272,11 +276,7 @@ menuconfig: $(BUILD)/esp-idf/config
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# qstr builds include headers so we need to make sure they are up to date
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$(HEADER_BUILD)/qstr.split: | $(BUILD)/esp-idf/config/sdkconfig.h
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ESP_IDF_COMPONENTS_LINK = freertos log esp_system esp_adc_cal esp32s2 bootloader_support pthread esp_timer vfs spi_flash app_update esp_common esp32s2 heap newlib driver xtensa soc esp_ringbuf esp_wifi esp_event wpa_supplicant mbedtls efuse nvs_flash esp_netif lwip esp-tls
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ESP_IDF_COMPONENTS_INCLUDE = driver freertos log soc
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INC += $(foreach component, $(ESP_IDF_COMPONENTS_INCLUDE), -isystem esp-idf/components/$(component)/include)
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ESP_IDF_COMPONENTS_LINK = app_update bootloader_support driver efuse esp32s2 esp_adc_cal esp_common esp_event esp_hw_support esp_netif esp_pm esp_ringbuf esp_rom esp_system esp_timer esp-tls esp_wifi freertos hal heap log lwip mbedtls newlib nvs_flash pthread soc spi_flash vfs wpa_supplicant xtensa
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ESP_IDF_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
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ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
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@ -284,11 +284,11 @@ ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENT
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MBEDTLS_COMPONENTS_LINK = crypto tls x509
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MBEDTLS_COMPONENTS_LINK_EXPANDED = $(foreach component, $(MBEDTLS_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/mbedtls/mbedtls/library/libmbed$(component).a)
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BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libhal.a
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BINARY_BLOBS = esp-idf/components/xtensa/esp32s2/libxt_hal.a
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BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a
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BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/esp32s2/, $(BINARY_WIFI_BLOBS))
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ESP_IDF_COMPONENTS_EXPANDED += $(BUILD)/esp-idf/esp-idf/soc/soc/esp32s2/libsoc_esp32s2.a
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ESP_IDF_COMPONENTS_EXPANDED += esp-idf/components/xtensa/esp32s2/libxt_hal.a
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ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/esp32s2/esp32s2_out.ld $(BUILD)/esp-idf/esp-idf/esp32s2/ld/esp32s2.project.ld
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FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE)
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@ -301,24 +301,42 @@ all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2
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esp-idf-stamp: $(BUILD)/esp-idf/config/sdkconfig.h
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$(Q)ninja -C $(BUILD)/esp-idf \
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bootloader/bootloader.bin \
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esp-idf/app_update/libapp_update.a \
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esp-idf/bootloader_support/libbootloader_support.a \
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esp-idf/esp-tls/libesp-tls.a \
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esp-idf/driver/libdriver.a \
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esp-idf/efuse/libefuse.a \
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esp-idf/esp32s2/libesp32s2.a \
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esp-idf/esp32s2/ld/esp32s2.project.ld \
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esp-idf/esp_adc_cal/libesp_adc_cal.a \
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esp-idf/esp_common/libesp_common.a \
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esp-idf/esp_event/libesp_event.a \
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esp-idf/esp_hw_support/libesp_hw_support.a \
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esp-idf/esp_netif/libesp_netif.a \
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esp-idf/esp_pm/libesp_pm.a \
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esp-idf/esp_ringbuf/libesp_ringbuf.a \
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esp-idf/esp_rom/libesp_rom.a \
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esp-idf/esp_system/libesp_system.a \
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esp-idf/esp_timer/libesp_timer.a \
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esp-idf/esp-tls/libesp-tls.a \
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esp-idf/esp_wifi/libesp_wifi.a \
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esp-idf/lwip/liblwip.a \
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esp-idf/nvs_flash/libnvs_flash.a \
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esp-idf/wpa_supplicant/libwpa_supplicant.a \
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esp-idf/mbedtls/libmbedtls.a \
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esp-idf/freertos/libfreertos.a \
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esp-idf/hal/libhal.a \
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esp-idf/heap/libheap.a \
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esp-idf/log/liblog.a \
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esp-idf/lwip/liblwip.a \
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esp-idf/mbedtls/libmbedtls.a \
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esp-idf/newlib/libnewlib.a \
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esp-idf/nvs_flash/libnvs_flash.a \
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esp-idf/pthread/libpthread.a \
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esp-idf/soc/libsoc.a \
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esp-idf/spi_flash/libspi_flash.a \
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esp-idf/vfs/libvfs.a \
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esp-idf/wpa_supplicant/libwpa_supplicant.a \
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esp-idf/xtensa/libxtensa.a
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$(BUILD)/firmware.elf: $(OBJ) | esp-idf-stamp
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$(STEPECHO) "LINK $@"
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$(Q)$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(ESP_IDF_COMPONENTS_EXPANDED) $(BINARY_BLOBS) $(MBEDTLS_COMPONENTS_LINK_EXPANDED) build-$(BOARD)/esp-idf/esp-idf/newlib/libnewlib.a -Wl,--end-group -u newlib_include_pthread_impl -Wl,--start-group $(LIBS) -Wl,--end-group build-$(BOARD)/esp-idf/esp-idf/pthread/libpthread.a -u __cxx_fatal_exception
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$(Q)$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(ESP_IDF_COMPONENTS_EXPANDED) $(BINARY_BLOBS) $(MBEDTLS_COMPONENTS_LINK_EXPANDED) $(BUILD)/esp-idf/esp-idf/newlib/libnewlib.a -Wl,--end-group -u newlib_include_pthread_impl -Wl,--start-group $(LIBS) -Wl,--end-group $(BUILD)/esp-idf/esp-idf/pthread/libpthread.a -u __cxx_fatal_exception
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$(BUILD)/circuitpython-firmware.bin: $(BUILD)/firmware.elf | tools/build_memory_info.py
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$(STEPECHO) "Create $@"
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@ -1,12 +1,3 @@
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# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE is not set
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# CONFIG_COMPILER_OPTIMIZATION_SIZE is not set
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# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set
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# TWAI configuration
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#
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# CONFIG_TWAI_ISR_IN_IRAM is not set
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# end of TWAI configuration
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#
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CONFIG_ESP32S2_SPIRAM_SUPPORT=y
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#
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@ -27,7 +18,6 @@ CONFIG_DEFAULT_PSRAM_CS_IO=26
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# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
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# CONFIG_SPIRAM_RODATA is not set
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# CONFIG_SPIRAM_USE_AHB_DBUS3 is not set
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# CONFIG_SPIRAM_SPEED_80M is not set
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CONFIG_SPIRAM_SPEED_40M=y
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# CONFIG_SPIRAM_SPEED_26M is not set
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@ -41,16 +31,3 @@ CONFIG_SPIRAM_USE_MEMMAP=y
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CONFIG_SPIRAM_MEMTEST=y
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# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
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# end of SPI RAM config
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# CONFIG_ESP_CONSOLE_UART_NONE is not set
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CONFIG_ESP_CONSOLE_UART_TX_GPIO=43
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CONFIG_ESP_CONSOLE_UART_RX_GPIO=44
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CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y
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CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y
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CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y
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# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set
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CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
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# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set
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# CONFIG_CONSOLE_UART_NONE is not set
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CONFIG_CONSOLE_UART_TX_GPIO=43
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CONFIG_CONSOLE_UART_RX_GPIO=44
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@ -44,7 +44,7 @@
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#include "esp_sleep.h"
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#include "components/soc/soc/esp32s2/include/soc/rtc_cntl_reg.h"
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#include "components/soc/esp32s2/include/soc/rtc_cntl_reg.h"
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#include "components/driver/include/driver/uart.h"
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// Singleton instance of SleepMemory.
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@ -27,16 +27,16 @@
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#include "py/runtime.h"
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#include "shared-bindings/alarm/pin/PinAlarm.h"
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#include "shared-bindings/microcontroller/__init__.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "supervisor/esp_port.h"
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#include "shared-bindings/alarm/pin/PinAlarm.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "shared-bindings/microcontroller/__init__.h"
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#include "components/driver/include/driver/rtc_io.h"
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#include "components/esp32s2/include/esp_sleep.h"
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#include "components/freertos/include/freertos/FreeRTOS.h"
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#include "components/soc/src/esp32s2/include/hal/gpio_ll.h"
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#include "components/esp_system/include/esp_sleep.h"
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#include "components/hal/esp32s2/include/hal/gpio_ll.h"
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#include "components/xtensa/include/esp_debug_helpers.h"
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#include "components/freertos/include/freertos/FreeRTOS.h"
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void common_hal_alarm_pin_pinalarm_construct(alarm_pin_pinalarm_obj_t *self, const mcu_pin_obj_t *pin, bool value, bool edge, bool pull) {
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if (edge) {
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@ -29,7 +29,7 @@
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#include "common-hal/microcontroller/Pin.h"
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#include "components/soc/include/hal/adc_types.h"
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#include "components/hal/include/hal/adc_types.h"
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#include "FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "py/obj.h"
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@ -88,8 +88,8 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
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}
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#endif
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if (xSemaphoreCreateMutexStatic(&self->semaphore) != &self->semaphore) {
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self->xSemaphore = xSemaphoreCreateMutexStatic(&self->xSemaphoreBuffer);
|
||||
if (self->xSemaphore == NULL) {
|
||||
mp_raise_RuntimeError(translate("Unable to create lock"));
|
||||
}
|
||||
self->sda_pin = sda;
|
||||
|
|
@ -168,7 +168,7 @@ bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) {
|
|||
if (self->has_lock) {
|
||||
return false;
|
||||
}
|
||||
self->has_lock = xSemaphoreTake(&self->semaphore, 0) == pdTRUE;
|
||||
self->has_lock = xSemaphoreTake(self->xSemaphore, 0) == pdTRUE;
|
||||
return self->has_lock;
|
||||
}
|
||||
|
||||
|
|
@ -177,7 +177,7 @@ bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) {
|
|||
}
|
||||
|
||||
void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) {
|
||||
xSemaphoreGive(&self->semaphore);
|
||||
xSemaphoreGive(self->xSemaphore);
|
||||
self->has_lock = false;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
|
||||
#include "components/soc/include/hal/i2c_types.h"
|
||||
#include "components/hal/include/hal/i2c_types.h"
|
||||
#include "FreeRTOS.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "py/obj.h"
|
||||
|
|
@ -39,7 +39,8 @@ typedef struct {
|
|||
const mcu_pin_obj_t *scl_pin;
|
||||
const mcu_pin_obj_t *sda_pin;
|
||||
i2c_port_t i2c_num;
|
||||
StaticSemaphore_t semaphore;
|
||||
SemaphoreHandle_t xSemaphore;
|
||||
StaticSemaphore_t xSemaphoreBuffer;
|
||||
bool has_lock;
|
||||
} busio_i2c_obj_t;
|
||||
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2016 Scott Shawcroft
|
||||
* Copyright (c) 2021 microDev
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
|
@ -24,282 +24,143 @@
|
|||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "shared-bindings/busio/SPI.h"
|
||||
#include "py/mperrno.h"
|
||||
#include "py/runtime.h"
|
||||
#include <string.h>
|
||||
|
||||
#include "shared-bindings/microcontroller/Pin.h"
|
||||
#include "py/runtime.h"
|
||||
#include "shared-bindings/busio/SPI.h"
|
||||
|
||||
#include "driver/spi_common_internal.h"
|
||||
|
||||
#define SPI_MAX_DMA_BITS (SPI_MAX_DMA_LEN * 8)
|
||||
|
||||
static bool spi_never_reset[SOC_SPI_PERIPH_NUM];
|
||||
static spi_device_handle_t spi_handle[SOC_SPI_PERIPH_NUM];
|
||||
|
||||
// Store one lock handle per device so that we can free it.
|
||||
static spi_bus_lock_dev_handle_t lock_dev_handle[SOC_SPI_PERIPH_NUM];
|
||||
static intr_handle_t intr_handle[SOC_SPI_PERIPH_NUM];
|
||||
static bool spi_bus_is_free(spi_host_device_t host_id) {
|
||||
return spi_bus_get_attr(host_id) == NULL;
|
||||
}
|
||||
|
||||
void spi_reset(void) {
|
||||
for (spi_host_device_t host_id = SPI2_HOST; host_id < SOC_SPI_PERIPH_NUM; host_id++) {
|
||||
if (spi_never_reset[host_id]) {
|
||||
continue;
|
||||
}
|
||||
bool in_use = false;
|
||||
if (lock_dev_handle[host_id] != NULL) {
|
||||
spi_bus_lock_unregister_dev(lock_dev_handle[host_id]);
|
||||
lock_dev_handle[host_id] = NULL;
|
||||
in_use = true;
|
||||
}
|
||||
if (intr_handle[host_id] != NULL) {
|
||||
esp_intr_free(intr_handle[host_id]);
|
||||
intr_handle[host_id] = NULL;
|
||||
in_use = true;
|
||||
}
|
||||
if (in_use) {
|
||||
if (!spi_bus_is_free(host_id)) {
|
||||
spi_bus_remove_device(spi_handle[host_id]);
|
||||
spi_bus_free(host_id);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// This is copied in from the ESP-IDF because it is static.
|
||||
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
static bool bus_uses_iomux_pins(spi_host_device_t host, const spi_bus_config_t *bus_config) {
|
||||
if (bus_config->sclk_io_num >= 0 &&
|
||||
bus_config->sclk_io_num != spi_periph_signal[host].spiclk_iomux_pin) {
|
||||
return false;
|
||||
static void set_spi_config(busio_spi_obj_t *self,
|
||||
uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
|
||||
const spi_device_interface_config_t device_config = {
|
||||
.clock_speed_hz = baudrate,
|
||||
.mode = phase | (polarity << 1),
|
||||
.spics_io_num = -1, // No CS pin
|
||||
.queue_size = 1,
|
||||
.pre_cb = NULL
|
||||
};
|
||||
esp_err_t result = spi_bus_add_device(self->host_id, &device_config, &spi_handle[self->host_id]);
|
||||
if (result != ESP_OK) {
|
||||
mp_raise_RuntimeError(translate("SPI configuration failed"));
|
||||
}
|
||||
if (bus_config->quadwp_io_num >= 0 &&
|
||||
bus_config->quadwp_io_num != spi_periph_signal[host].spiwp_iomux_pin) {
|
||||
return false;
|
||||
}
|
||||
if (bus_config->quadhd_io_num >= 0 &&
|
||||
bus_config->quadhd_io_num != spi_periph_signal[host].spihd_iomux_pin) {
|
||||
return false;
|
||||
}
|
||||
if (bus_config->mosi_io_num >= 0 &&
|
||||
bus_config->mosi_io_num != spi_periph_signal[host].spid_iomux_pin) {
|
||||
return false;
|
||||
}
|
||||
if (bus_config->miso_io_num >= 0 &&
|
||||
bus_config->miso_io_num != spi_periph_signal[host].spiq_iomux_pin) {
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
// End copied code.
|
||||
|
||||
static bool spi_bus_is_free(spi_host_device_t host_id) {
|
||||
return spi_bus_get_attr(host_id) == NULL;
|
||||
}
|
||||
|
||||
static void spi_interrupt_handler(void *arg) {
|
||||
// busio_spi_obj_t *self = arg;
|
||||
}
|
||||
|
||||
// The interrupt may get invoked by the bus lock.
|
||||
static void spi_bus_intr_enable(void *self) {
|
||||
esp_intr_enable(((busio_spi_obj_t *)self)->interrupt);
|
||||
}
|
||||
|
||||
// The interrupt is always disabled by the ISR itself, not exposed
|
||||
static void spi_bus_intr_disable(void *self) {
|
||||
esp_intr_disable(((busio_spi_obj_t *)self)->interrupt);
|
||||
self->baudrate = baudrate;
|
||||
self->polarity = polarity;
|
||||
self->phase = phase;
|
||||
self->bits = bits;
|
||||
}
|
||||
|
||||
void common_hal_busio_spi_construct(busio_spi_obj_t *self,
|
||||
const mcu_pin_obj_t *clock, const mcu_pin_obj_t *mosi,
|
||||
const mcu_pin_obj_t *miso) {
|
||||
|
||||
spi_bus_config_t bus_config;
|
||||
bus_config.mosi_io_num = mosi != NULL ? mosi->number : -1;
|
||||
bus_config.miso_io_num = miso != NULL ? miso->number : -1;
|
||||
bus_config.sclk_io_num = clock != NULL ? clock->number : -1;
|
||||
bus_config.quadwp_io_num = -1;
|
||||
bus_config.quadhd_io_num = -1;
|
||||
bus_config.max_transfer_sz = 0; // Uses the default
|
||||
bus_config.flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK |
|
||||
(mosi != NULL ? SPICOMMON_BUSFLAG_MOSI : 0) |
|
||||
(miso != NULL ? SPICOMMON_BUSFLAG_MISO : 0);
|
||||
bus_config.intr_flags = 0;
|
||||
const spi_bus_config_t bus_config = {
|
||||
.mosi_io_num = mosi != NULL ? mosi->number : -1,
|
||||
.miso_io_num = miso != NULL ? miso->number : -1,
|
||||
.sclk_io_num = clock != NULL ? clock->number : -1,
|
||||
.quadwp_io_num = -1,
|
||||
.quadhd_io_num = -1,
|
||||
};
|
||||
|
||||
// RAM and Flash is often on SPI1 and is unsupported by the IDF so use it as
|
||||
// a flag value.
|
||||
spi_host_device_t host_id = SPI1_HOST;
|
||||
self->connected_through_gpio = true;
|
||||
// Try and save SPI2 for pins that are on the IOMUX
|
||||
if (bus_uses_iomux_pins(SPI2_HOST, &bus_config) && spi_bus_is_free(SPI2_HOST)) {
|
||||
host_id = SPI2_HOST;
|
||||
self->connected_through_gpio = false;
|
||||
} else if (spi_bus_is_free(SPI3_HOST)) {
|
||||
host_id = SPI3_HOST;
|
||||
} else if (spi_bus_is_free(SPI2_HOST)) {
|
||||
host_id = SPI2_HOST;
|
||||
for (spi_host_device_t host_id = SPI2_HOST; host_id < SOC_SPI_PERIPH_NUM; host_id++) {
|
||||
if (spi_bus_is_free(host_id)) {
|
||||
self->host_id = host_id;
|
||||
}
|
||||
}
|
||||
if (host_id == SPI1_HOST) {
|
||||
|
||||
if (self->host_id == 0) {
|
||||
mp_raise_ValueError(translate("All SPI peripherals are in use"));
|
||||
}
|
||||
|
||||
esp_err_t result = spi_bus_initialize(host_id, &bus_config, host_id /* dma channel */);
|
||||
esp_err_t result = spi_bus_initialize(self->host_id, &bus_config, self->host_id /* dma channel */);
|
||||
if (result == ESP_ERR_NO_MEM) {
|
||||
mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
|
||||
} else if (result == ESP_ERR_INVALID_ARG) {
|
||||
mp_raise_ValueError(translate("Invalid pins"));
|
||||
}
|
||||
|
||||
// After this point, we need to deinit to free IDF memory so fill out self's pins.
|
||||
self->clock_pin = clock;
|
||||
self->MOSI_pin = mosi;
|
||||
self->MISO_pin = miso;
|
||||
self->host_id = host_id;
|
||||
set_spi_config(self, 250000, 0, 0, 8);
|
||||
|
||||
spi_bus_lock_dev_config_t config = { .flags = 0 };
|
||||
// The returned lock is stored in the bus lock but must be freed separately with
|
||||
// spi_bus_lock_unregister_dev.
|
||||
result = spi_bus_lock_register_dev(spi_bus_get_attr(host_id)->lock,
|
||||
&config,
|
||||
&self->lock);
|
||||
if (result == ESP_ERR_NO_MEM) {
|
||||
common_hal_busio_spi_deinit(self);
|
||||
mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
|
||||
self->MOSI = mosi;
|
||||
self->MISO = miso;
|
||||
self->clock = clock;
|
||||
|
||||
if (mosi != NULL) {
|
||||
claim_pin(mosi);
|
||||
}
|
||||
lock_dev_handle[host_id] = self->lock;
|
||||
|
||||
result = esp_intr_alloc(spicommon_irqsource_for_host(host_id),
|
||||
bus_config.intr_flags | ESP_INTR_FLAG_INTRDISABLED,
|
||||
spi_interrupt_handler, self, &self->interrupt);
|
||||
if (result == ESP_ERR_NO_MEM) {
|
||||
common_hal_busio_spi_deinit(self);
|
||||
mp_raise_msg(&mp_type_MemoryError, translate("ESP-IDF memory allocation failed"));
|
||||
if (miso != NULL) {
|
||||
claim_pin(miso);
|
||||
}
|
||||
intr_handle[host_id] = self->interrupt;
|
||||
spi_bus_lock_set_bg_control(spi_bus_get_attr(host_id)->lock, spi_bus_intr_enable, spi_bus_intr_disable, self);
|
||||
|
||||
spi_hal_context_t *hal = &self->hal_context;
|
||||
|
||||
// spi_hal_init clears the given hal context so set everything after.
|
||||
spi_hal_init(hal, host_id);
|
||||
|
||||
// We don't use native CS.
|
||||
// hal->cs_setup = 0;
|
||||
// hal->cs_hold = 0;
|
||||
// hal->cs_pin_id = 0;
|
||||
|
||||
hal->sio = 0;
|
||||
hal->half_duplex = 0;
|
||||
// hal->tx_lsbfirst = 0;
|
||||
// hal->rx_lsbfirst = 0;
|
||||
hal->no_compensate = 1;
|
||||
// Ignore CS bits
|
||||
|
||||
// We don't use cmd, addr or dummy bits.
|
||||
// hal->cmd = 0;
|
||||
// hal->cmd_bits = 0;
|
||||
// hal->addr_bits = 0;
|
||||
// hal->dummy_bits = 0;
|
||||
// hal->addr = 0;
|
||||
|
||||
claim_pin(self->clock_pin);
|
||||
if (self->MOSI_pin != NULL) {
|
||||
claim_pin(self->MOSI_pin);
|
||||
}
|
||||
if (self->MISO_pin != NULL) {
|
||||
claim_pin(self->MISO_pin);
|
||||
}
|
||||
|
||||
hal->io_mode = SPI_LL_IO_MODE_NORMAL;
|
||||
|
||||
common_hal_busio_spi_configure(self, 250000, 0, 0, 8);
|
||||
claim_pin(clock);
|
||||
}
|
||||
|
||||
void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
|
||||
spi_never_reset[self->host_id] = true;
|
||||
|
||||
common_hal_never_reset_pin(self->clock_pin);
|
||||
if (self->MOSI_pin != NULL) {
|
||||
common_hal_never_reset_pin(self->MOSI_pin);
|
||||
}
|
||||
if (self->MISO_pin != NULL) {
|
||||
common_hal_never_reset_pin(self->MISO_pin);
|
||||
}
|
||||
common_hal_never_reset_pin(self->clock);
|
||||
common_hal_never_reset_pin(self->MOSI);
|
||||
common_hal_never_reset_pin(self->MISO);
|
||||
}
|
||||
|
||||
bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
|
||||
return self->clock_pin == NULL;
|
||||
return self->clock == NULL;
|
||||
}
|
||||
|
||||
void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
|
||||
if (common_hal_busio_spi_deinited(self)) {
|
||||
return;
|
||||
}
|
||||
|
||||
spi_never_reset[self->host_id] = false;
|
||||
if (self->lock != NULL) {
|
||||
spi_bus_lock_unregister_dev(self->lock);
|
||||
lock_dev_handle[self->host_id] = NULL;
|
||||
}
|
||||
if (self->interrupt != NULL) {
|
||||
esp_intr_free(self->interrupt);
|
||||
intr_handle[self->host_id] = NULL;
|
||||
}
|
||||
spi_bus_remove_device(spi_handle[self->host_id]);
|
||||
spi_bus_free(self->host_id);
|
||||
|
||||
common_hal_reset_pin(self->clock_pin);
|
||||
common_hal_reset_pin(self->MOSI_pin);
|
||||
common_hal_reset_pin(self->MISO_pin);
|
||||
self->clock_pin = NULL;
|
||||
self->MISO_pin = NULL;
|
||||
self->MOSI_pin = NULL;
|
||||
common_hal_reset_pin(self->MOSI);
|
||||
common_hal_reset_pin(self->MISO);
|
||||
common_hal_reset_pin(self->clock);
|
||||
self->clock = NULL;
|
||||
}
|
||||
|
||||
bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
|
||||
uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
|
||||
if (baudrate == self->target_frequency &&
|
||||
if (baudrate == self->baudrate &&
|
||||
polarity == self->polarity &&
|
||||
phase == self->phase &&
|
||||
bits == self->bits) {
|
||||
return true;
|
||||
}
|
||||
self->hal_context.mode = polarity << 1 | phase;
|
||||
self->polarity = polarity;
|
||||
self->phase = phase;
|
||||
self->bits = bits;
|
||||
self->target_frequency = baudrate;
|
||||
self->hal_context.timing_conf = &self->timing_conf;
|
||||
esp_err_t result = spi_hal_get_clock_conf(&self->hal_context,
|
||||
self->target_frequency,
|
||||
128 /* duty_cycle */,
|
||||
self->connected_through_gpio,
|
||||
0 /* input_delay_ns */,
|
||||
&self->real_frequency,
|
||||
&self->timing_conf);
|
||||
if (result != ESP_OK) {
|
||||
return false;
|
||||
}
|
||||
|
||||
spi_hal_setup_device(&self->hal_context);
|
||||
spi_bus_remove_device(spi_handle[self->host_id]);
|
||||
set_spi_config(self, baudrate, polarity, phase, bits);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
|
||||
// If our lock has already been taken then return false because someone else
|
||||
// may already grabbed it in our call stack.
|
||||
if (self->has_lock) {
|
||||
return false;
|
||||
bool grabbed_lock = false;
|
||||
if (!self->has_lock) {
|
||||
grabbed_lock = true;
|
||||
self->has_lock = true;
|
||||
}
|
||||
// Wait to grab the lock from another task.
|
||||
esp_err_t result = spi_bus_lock_acquire_start(self->lock, portMAX_DELAY);
|
||||
self->has_lock = result == ESP_OK;
|
||||
return self->has_lock;
|
||||
return grabbed_lock;
|
||||
}
|
||||
|
||||
bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
|
||||
|
|
@ -307,13 +168,12 @@ bool common_hal_busio_spi_has_lock(busio_spi_obj_t *self) {
|
|||
}
|
||||
|
||||
void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
|
||||
spi_bus_lock_acquire_end(self->lock);
|
||||
self->has_lock = false;
|
||||
}
|
||||
|
||||
bool common_hal_busio_spi_write(busio_spi_obj_t *self,
|
||||
const uint8_t *data, size_t len) {
|
||||
if (self->MOSI_pin == NULL) {
|
||||
if (self->MOSI == NULL) {
|
||||
mp_raise_ValueError(translate("No MOSI Pin"));
|
||||
}
|
||||
return common_hal_busio_spi_transfer(self, data, NULL, len);
|
||||
|
|
@ -321,11 +181,10 @@ bool common_hal_busio_spi_write(busio_spi_obj_t *self,
|
|||
|
||||
bool common_hal_busio_spi_read(busio_spi_obj_t *self,
|
||||
uint8_t *data, size_t len, uint8_t write_value) {
|
||||
|
||||
if (self->MISO_pin == NULL) {
|
||||
if (self->MISO == NULL) {
|
||||
mp_raise_ValueError(translate("No MISO Pin"));
|
||||
}
|
||||
if (self->MOSI_pin == NULL) {
|
||||
if (self->MOSI == NULL) {
|
||||
return common_hal_busio_spi_transfer(self, NULL, data, len);
|
||||
} else {
|
||||
memset(data, write_value, len);
|
||||
|
|
@ -333,86 +192,73 @@ bool common_hal_busio_spi_read(busio_spi_obj_t *self,
|
|||
}
|
||||
}
|
||||
|
||||
bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, const uint8_t *data_out, uint8_t *data_in, size_t len) {
|
||||
bool common_hal_busio_spi_transfer(busio_spi_obj_t *self,
|
||||
const uint8_t *data_out, uint8_t *data_in, size_t len) {
|
||||
if (len == 0) {
|
||||
return true;
|
||||
}
|
||||
// Other than the read special case, stop transfers that don't have a pin/array match
|
||||
if (!self->MOSI_pin && (data_out != data_in)) {
|
||||
if (!self->MOSI && (data_out != data_in)) {
|
||||
mp_raise_ValueError(translate("No MOSI Pin"));
|
||||
}
|
||||
if (!self->MISO_pin && data_in) {
|
||||
if (!self->MISO && data_in) {
|
||||
mp_raise_ValueError(translate("No MISO Pin"));
|
||||
}
|
||||
|
||||
spi_hal_context_t *hal = &self->hal_context;
|
||||
hal->send_buffer = NULL;
|
||||
hal->rcv_buffer = NULL;
|
||||
// Reset timing_conf in case we've moved since the last time we used it.
|
||||
hal->timing_conf = &self->timing_conf;
|
||||
lldesc_t tx_dma __attribute__((aligned(16)));
|
||||
lldesc_t rx_dma __attribute__((aligned(16)));
|
||||
hal->dmadesc_tx = &tx_dma;
|
||||
hal->dmadesc_rx = &rx_dma;
|
||||
hal->dmadesc_n = 1;
|
||||
spi_transaction_t transaction = { 0 };
|
||||
|
||||
size_t burst_length;
|
||||
// If both of the incoming pointers are DMA capable then use DMA. Otherwise, do
|
||||
// bursts the size of the SPI data buffer without DMA.
|
||||
if ((data_out == NULL || esp_ptr_dma_capable(data_out)) &&
|
||||
(data_in == NULL || esp_ptr_dma_capable(data_out))) {
|
||||
hal->dma_enabled = 1;
|
||||
burst_length = LLDESC_MAX_NUM_PER_DESC;
|
||||
} else {
|
||||
hal->dma_enabled = 0;
|
||||
burst_length = sizeof(hal->hw->data_buf);
|
||||
// When switching to non-DMA, we need to make sure DMA is off. Otherwise,
|
||||
// the S2 will transmit zeroes instead of our data.
|
||||
hal->hw->dma_out_link.dma_tx_ena = 0;
|
||||
hal->hw->dma_out_link.stop = 1;
|
||||
}
|
||||
// Round to nearest whole set of bits
|
||||
int bits_to_send = len * 8 / self->bits * self->bits;
|
||||
|
||||
// This rounds up.
|
||||
size_t burst_count = (len + burst_length - 1) / burst_length;
|
||||
for (size_t i = 0; i < burst_count; i++) {
|
||||
size_t offset = burst_length * i;
|
||||
size_t this_length = len - offset;
|
||||
if (this_length > burst_length) {
|
||||
this_length = burst_length;
|
||||
}
|
||||
hal->tx_bitlen = this_length * self->bits;
|
||||
hal->rx_bitlen = this_length * self->bits;
|
||||
if (len <= 4) {
|
||||
if (data_out != NULL) {
|
||||
hal->send_buffer = (uint8_t *)data_out + offset;
|
||||
}
|
||||
if (data_in != NULL) {
|
||||
hal->rcv_buffer = data_in + offset;
|
||||
memcpy(&transaction.tx_data, data_out, len);
|
||||
}
|
||||
|
||||
spi_hal_setup_trans(hal);
|
||||
spi_hal_prepare_data(hal);
|
||||
spi_hal_user_start(hal);
|
||||
// TODO: Switch to waiting on a lock that is given by an interrupt.
|
||||
while (!spi_hal_usr_is_done(hal)) {
|
||||
transaction.flags = SPI_TRANS_USE_TXDATA | SPI_TRANS_USE_RXDATA;
|
||||
transaction.length = bits_to_send;
|
||||
spi_device_transmit(spi_handle[self->host_id], &transaction);
|
||||
|
||||
if (data_in != NULL) {
|
||||
memcpy(data_in, &transaction.rx_data, len);
|
||||
}
|
||||
} else {
|
||||
int offset = 0;
|
||||
int bits_remaining = bits_to_send;
|
||||
|
||||
while (bits_remaining && !mp_hal_is_interrupted()) {
|
||||
memset(&transaction, 0, sizeof(transaction));
|
||||
|
||||
transaction.length =
|
||||
bits_remaining > SPI_MAX_DMA_BITS ? SPI_MAX_DMA_BITS : bits_remaining;
|
||||
|
||||
if (data_out != NULL) {
|
||||
transaction.tx_buffer = data_out + offset;
|
||||
}
|
||||
if (data_in != NULL) {
|
||||
transaction.rx_buffer = data_in + offset;
|
||||
}
|
||||
|
||||
spi_device_transmit(spi_handle[self->host_id], &transaction);
|
||||
bits_remaining -= transaction.length;
|
||||
|
||||
// doesn't need ceil(); loop ends when bits_remaining is 0
|
||||
offset += transaction.length / 8;
|
||||
|
||||
RUN_BACKGROUND_TASKS;
|
||||
}
|
||||
spi_hal_fetch_result(hal);
|
||||
}
|
||||
hal->dmadesc_tx = NULL;
|
||||
hal->dmadesc_rx = NULL;
|
||||
hal->dmadesc_n = 0;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
uint32_t common_hal_busio_spi_get_frequency(busio_spi_obj_t *self) {
|
||||
return self->real_frequency;
|
||||
}
|
||||
|
||||
uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t *self) {
|
||||
return self->phase;
|
||||
return self->baudrate;
|
||||
}
|
||||
|
||||
uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t *self) {
|
||||
return self->polarity;
|
||||
}
|
||||
|
||||
uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t *self) {
|
||||
return self->phase;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2016 Scott Shawcroft
|
||||
* Copyright (c) 2021 microDev
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
|
|
@ -27,30 +27,24 @@
|
|||
#ifndef MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_SPI_H
|
||||
#define MICROPY_INCLUDED_ESP32S2_COMMON_HAL_BUSIO_SPI_H
|
||||
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
|
||||
#include "components/driver/include/driver/spi_common_internal.h"
|
||||
#include "components/soc/include/hal/spi_hal.h"
|
||||
#include "components/soc/include/hal/spi_types.h"
|
||||
#include "py/obj.h"
|
||||
#include "driver/spi_master.h"
|
||||
#include "shared-bindings/microcontroller/Pin.h"
|
||||
|
||||
typedef struct {
|
||||
mp_obj_base_t base;
|
||||
const mcu_pin_obj_t *clock_pin;
|
||||
const mcu_pin_obj_t *MOSI_pin;
|
||||
const mcu_pin_obj_t *MISO_pin;
|
||||
|
||||
const mcu_pin_obj_t* MOSI;
|
||||
const mcu_pin_obj_t* MISO;
|
||||
const mcu_pin_obj_t* clock;
|
||||
|
||||
spi_host_device_t host_id;
|
||||
spi_bus_lock_dev_handle_t lock;
|
||||
spi_hal_context_t hal_context;
|
||||
spi_hal_timing_conf_t timing_conf;
|
||||
intr_handle_t interrupt;
|
||||
uint32_t target_frequency;
|
||||
int32_t real_frequency;
|
||||
uint8_t polarity;
|
||||
uint8_t phase;
|
||||
|
||||
uint8_t bits;
|
||||
uint8_t phase;
|
||||
uint8_t polarity;
|
||||
uint32_t baudrate;
|
||||
|
||||
bool has_lock;
|
||||
bool connected_through_gpio;
|
||||
} busio_spi_obj_t;
|
||||
|
||||
void spi_reset(void);
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@
|
|||
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
|
||||
#include "components/soc/include/hal/uart_types.h"
|
||||
#include "components/hal/include/hal/uart_types.h"
|
||||
#include "py/obj.h"
|
||||
|
||||
typedef struct {
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
|
||||
#include "components/driver/include/driver/gpio.h"
|
||||
|
||||
#include "components/soc/include/hal/gpio_hal.h"
|
||||
#include "components/hal/include/hal/gpio_hal.h"
|
||||
|
||||
void common_hal_digitalio_digitalinout_never_reset(
|
||||
digitalio_digitalinout_obj_t *self) {
|
||||
|
|
|
|||
|
|
@ -38,10 +38,7 @@ static esp_ota_handle_t update_handle = 0;
|
|||
static const char *TAG = "dualbank";
|
||||
|
||||
void dualbank_reset(void) {
|
||||
// should use `abort` instead of `end`
|
||||
// but not in idf v4.2
|
||||
// esp_ota_abort(update_handle);
|
||||
if (esp_ota_end(update_handle) == ESP_OK) {
|
||||
if (esp_ota_abort(update_handle) == ESP_OK) {
|
||||
update_handle = 0;
|
||||
update_partition = NULL;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@
|
|||
#include "py/mphal.h"
|
||||
|
||||
#include "components/driver/include/driver/gpio.h"
|
||||
#include "components/soc/include/hal/gpio_hal.h"
|
||||
#include "components/hal/include/hal/gpio_hal.h"
|
||||
|
||||
STATIC uint32_t never_reset_pins[2];
|
||||
STATIC uint32_t in_use[2];
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@
|
|||
|
||||
#include "py/obj.h"
|
||||
#include "py/runtime.h"
|
||||
#include "components/soc/soc/include/soc/rtc_periph.h"
|
||||
#include "components/soc/include/soc/rtc_periph.h"
|
||||
#include "shared-bindings/rtc/RTC.h"
|
||||
|
||||
void common_hal_rtc_get_time(timeutils_struct_time_t *tm) {
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
Subproject commit f30a865fd1a44d880b909b84112f74741412c2ce
|
||||
Subproject commit d97b6863badec4643bf8d1d1058a65d723572882
|
||||
|
|
@ -35,9 +35,9 @@
|
|||
#include "esp32s2_peripherals_config.h"
|
||||
#include "esp-idf/config/sdkconfig.h"
|
||||
|
||||
#include "components/soc/include/hal/gpio_types.h"
|
||||
#include "components/soc/include/hal/adc_types.h"
|
||||
#include "components/soc/include/hal/touch_sensor_types.h"
|
||||
#include "components/hal/include/hal/gpio_types.h"
|
||||
#include "components/hal/include/hal/adc_types.h"
|
||||
#include "components/hal/include/hal/touch_sensor_types.h"
|
||||
|
||||
typedef struct {
|
||||
PIN_PREFIX_FIELDS
|
||||
|
|
|
|||
|
|
@ -24,8 +24,6 @@
|
|||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "components/soc/include/hal/gpio_types.h"
|
||||
// above include fixes build error in idf@v4.2
|
||||
#include "peripherals/touch.h"
|
||||
|
||||
static bool touch_inited = false;
|
||||
|
|
|
|||
|
|
@ -59,8 +59,8 @@
|
|||
#include "components/esp_rom/include/esp32s2/rom/ets_sys.h"
|
||||
#include "components/heap/include/esp_heap_caps.h"
|
||||
#include "components/xtensa/include/esp_debug_helpers.h"
|
||||
#include "components/soc/soc/esp32s2/include/soc/cache_memory.h"
|
||||
#include "components/soc/soc/esp32s2/include/soc/rtc_cntl_reg.h"
|
||||
#include "components/soc/esp32s2/include/soc/cache_memory.h"
|
||||
#include "components/soc/esp32s2/include/soc/rtc_cntl_reg.h"
|
||||
|
||||
#if CIRCUITPY_AUDIOBUSIO
|
||||
#include "common-hal/audiobusio/__init__.h"
|
||||
|
|
|
|||
|
|
@ -31,11 +31,11 @@
|
|||
#include "lib/utils/interrupt_char.h"
|
||||
#include "lib/mp-readline/readline.h"
|
||||
|
||||
#include "components/soc/soc/esp32s2/include/soc/usb_periph.h"
|
||||
#include "components/driver/include/driver/periph_ctrl.h"
|
||||
#include "components/driver/include/driver/gpio.h"
|
||||
#include "components/driver/include/driver/periph_ctrl.h"
|
||||
#include "components/esp_rom/include/esp32s2/rom/gpio.h"
|
||||
#include "components/soc/src/esp32s2/include/hal/gpio_ll.h"
|
||||
#include "components/hal/esp32s2/include/hal/gpio_ll.h"
|
||||
#include "components/soc/esp32s2/include/soc/usb_periph.h"
|
||||
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
|
|
|
|||
Loading…
Reference in New Issue