Merge pull request #6694 from dhalbert/esp32-no-psram
ESP32 no psram support; other ESP32 cleanup
This commit is contained in:
commit
e0cb8ef17e
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@ -1,11 +1,4 @@
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#
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# Partition Table
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||||
#
|
||||
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
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CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
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||||
# end of Partition Table
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#
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CONFIG_ESP32_SPIRAM_SUPPORT=y
|
||||
# SPI RAM config
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#
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# CONFIG_SPIRAM_TYPE_AUTO is not set
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|
@ -25,15 +18,7 @@ CONFIG_SPIRAM_MEMTEST=y
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|||
# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
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CONFIG_SPIRAM_CACHE_WORKAROUND=y
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#
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# SPI RAM config
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#
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CONFIG_ESP32_SPIRAM_SUPPORT=y
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# CONFIG_SPIRAM_TYPE_AUTO is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
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### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
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# Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
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### #
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### # ESP System Settings
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### #
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|
|
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@ -0,0 +1,45 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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||||
*
|
||||
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
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*
|
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
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#include "supervisor/board.h"
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#include "mpconfigboard.h"
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#include "shared-bindings/microcontroller/Pin.h"
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#include "components/driver/include/driver/gpio.h"
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#include "components/hal/include/hal/gpio_hal.h"
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#include "common-hal/microcontroller/Pin.h"
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void board_init(void) {
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}
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bool board_requests_safe_mode(void) {
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return false;
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}
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void reset_board(void) {
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}
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void board_deinit(void) {
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}
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@ -0,0 +1,45 @@
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|||
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
|
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* The MIT License (MIT)
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||||
*
|
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* Copyright (c) 2022 Dan Halbert for Adafruit Industries
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*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
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|
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// Micropython setup
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#define MICROPY_HW_BOARD_NAME "Adafruit Feather HUZZAH32"
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#define MICROPY_HW_MCU_NAME "ESP32"
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#define MICROPY_HW_LED_STATUS (&pin_GPIO13)
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#define CIRCUITPY_BOARD_I2C (1)
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#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO22, .sda = &pin_GPIO23}}
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#define CIRCUITPY_BOARD_SPI (1)
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#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO5, .mosi = &pin_GPIO18, .miso = &pin_GPIO19}}
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#define CIRCUITPY_BOARD_UART (1)
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#define CIRCUITPY_BOARD_UART_PIN {{.tx = &pin_GPIO17, .rx = &pin_GPIO16}}
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// UART pins attached to the USB-serial converter chip
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#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO1)
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#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO3)
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@ -0,0 +1,18 @@
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CIRCUITPY_CREATOR_ID = 0x0000239A
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CIRCUITPY_CREATION_ID = 0x00320002
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IDF_TARGET = esp32
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INTERNAL_FLASH_FILESYSTEM = 1
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LONGINT_IMPL = MPZ
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# The default queue depth of 16 overflows on release builds,
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# so increase it to 32.
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CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
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CIRCUITPY_STATUS_BAR = 0
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CIRCUITPY_WEB_WORKFLOW = 0
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CIRCUITPY_ESP_FLASH_MODE = dio
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CIRCUITPY_ESP_FLASH_FREQ = 40m
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CIRCUITPY_ESP_FLASH_SIZE = 4MB
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@ -0,0 +1,79 @@
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#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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// External pins are in silkscreen order, from top to bottom, left side, then right side
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{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO25) },
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{ MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO25) },
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{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO34) },
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{ MP_ROM_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO34) },
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{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO39) },
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{ MP_ROM_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO39) },
|
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|
||||
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO36) },
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{ MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO36) },
|
||||
|
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{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) },
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|
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{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) },
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||||
|
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{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO18) },
|
||||
|
||||
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO16) },
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{ MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO16) },
|
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{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO17) },
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||||
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{ MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO33) },
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{ MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO32) },
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{ MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO32) },
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{ MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) },
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{ MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO14) },
|
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{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO23) },
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{ MP_ROM_QSTR(MP_QSTR_D23), MP_ROM_PTR(&pin_GPIO23) },
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{ MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO35) },
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{ MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO35) },
|
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{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO0) },
|
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{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
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{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
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{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
|
@ -0,0 +1,20 @@
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CONFIG_ESP32_ECO3_CACHE_LOCK_FIX=y
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CONFIG_ESP32_SPIRAM_SUPPORT=n
|
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|
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# Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
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||||
### #
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### # ESP System Settings
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||||
### #
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### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
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### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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||||
### CONFIG_ESP_CONSOLE_NONE is not set
|
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### CONFIG_ESP_CONSOLE_UART=y
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### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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||||
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
|
||||
### CONFIG_ESP_CONSOLE_UART_NUM=0
|
||||
### CONFIG_ESP_CONSOLE_UART_TX_GPIO=17
|
||||
### CONFIG_ESP_CONSOLE_UART_RX_GPIO=16
|
||||
### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
||||
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
|
||||
### # end of ESP System Settings
|
|
@ -1,10 +1,3 @@
|
|||
#
|
||||
# Partition Table
|
||||
#
|
||||
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
|
||||
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
|
||||
# end of Partition Table
|
||||
|
||||
#
|
||||
# SPI RAM config
|
||||
#
|
||||
|
@ -33,7 +26,7 @@ CONFIG_ESP32_SPIRAM_SUPPORT=y
|
|||
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
|
||||
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
|
||||
|
||||
### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
|
||||
### # Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
|
||||
### #
|
||||
### # ESP System Settings
|
||||
### #
|
||||
|
@ -45,7 +38,7 @@ CONFIG_ESP32_SPIRAM_SUPPORT=y
|
|||
### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
|
||||
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
|
||||
### CONFIG_ESP_CONSOLE_UART_NUM=0
|
||||
### CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
|
||||
### CONFIG_ESP_CONSOLE_UART_TX_GPIO=32
|
||||
### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
|
||||
### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
||||
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
|
||||
|
|
|
@ -1,13 +1,4 @@
|
|||
#
|
||||
# Partition Table
|
||||
#
|
||||
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
|
||||
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
|
||||
# end of Partition Table
|
||||
|
||||
CONFIG_ESP_INT_WDT_TIMEOUT_MS=3000
|
||||
|
||||
#
|
||||
CONFIG_ESP32_SPIRAM_SUPPORT=y
|
||||
# SPI RAM config
|
||||
#
|
||||
# CONFIG_SPIRAM_TYPE_AUTO is not set
|
||||
|
@ -27,28 +18,20 @@ CONFIG_SPIRAM_MEMTEST=y
|
|||
# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
|
||||
CONFIG_SPIRAM_CACHE_WORKAROUND=y
|
||||
|
||||
#
|
||||
# SPI RAM config
|
||||
#
|
||||
CONFIG_ESP32_SPIRAM_SUPPORT=y
|
||||
# CONFIG_SPIRAM_TYPE_AUTO is not set
|
||||
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
|
||||
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
|
||||
|
||||
### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
|
||||
# Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
|
||||
### #
|
||||
### # ESP System Settings
|
||||
### #
|
||||
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
|
||||
### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
|
||||
### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
|
||||
CONFIG_ESP_CONSOLE_UART_CUSTOM=y
|
||||
### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
|
||||
### # CONFIG_ESP_CONSOLE_NONE is not set
|
||||
CONFIG_ESP_CONSOLE_UART=y
|
||||
CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
|
||||
### CONFIG_ESP_CONSOLE_UART=y
|
||||
### nCONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
|
||||
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
|
||||
CONFIG_ESP_CONSOLE_UART_NUM=0
|
||||
CONFIG_ESP_CONSOLE_UART_TX_GPIO=12
|
||||
CONFIG_ESP_CONSOLE_UART_RX_GPIO=15
|
||||
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
||||
### CONFIG_ESP_CONSOLE_UART_NUM=0
|
||||
### CONFIG_ESP_CONSOLE_UART_TX_GPIO=12
|
||||
### CONFIG_ESP_CONSOLE_UART_RX_GPIO=15
|
||||
### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
||||
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
|
||||
### # end of ESP System Settings
|
||||
|
|
|
@ -1 +1 @@
|
|||
Subproject commit ddb7ddbcb613a582e0a91eda8b1d2510dd0a2d83
|
||||
Subproject commit d51f7d882187afa4b39c2613fd0fe2ac2fea1145
|
|
@ -1,3 +1,6 @@
|
|||
#
|
||||
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
|
||||
#
|
||||
CONFIG_IDF_TARGET_ARCH_XTENSA=y
|
||||
CONFIG_IDF_TARGET="esp32"
|
||||
CONFIG_IDF_TARGET_ESP32=y
|
||||
|
@ -112,19 +115,6 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200
|
|||
CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
|
||||
# end of Serial flasher config
|
||||
|
||||
#
|
||||
# Partition Table
|
||||
#
|
||||
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
|
||||
# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set
|
||||
# CONFIG_PARTITION_TABLE_TWO_OTA is not set
|
||||
CONFIG_PARTITION_TABLE_CUSTOM=y
|
||||
# CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
|
||||
# CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
|
||||
CONFIG_PARTITION_TABLE_OFFSET=0x8000
|
||||
CONFIG_PARTITION_TABLE_MD5=y
|
||||
# end of Partition Table
|
||||
|
||||
#
|
||||
# Compiler options
|
||||
#
|
||||
|
@ -480,16 +470,10 @@ CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
|
|||
CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
|
||||
CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
|
||||
# CONFIG_ESP_CONSOLE_UART_DEFAULT is not set
|
||||
CONFIG_ESP_CONSOLE_UART_CUSTOM=y
|
||||
# CONFIG_ESP_CONSOLE_NONE is not set
|
||||
CONFIG_ESP_CONSOLE_UART=y
|
||||
# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
|
||||
CONFIG_ESP_CONSOLE_NONE=y
|
||||
CONFIG_ESP_CONSOLE_MULTIPLE_UART=y
|
||||
CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
|
||||
# CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
|
||||
CONFIG_ESP_CONSOLE_UART_NUM=0
|
||||
CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
|
||||
CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
|
||||
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
||||
CONFIG_ESP_CONSOLE_UART_NUM=-1
|
||||
CONFIG_ESP_INT_WDT=y
|
||||
CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
|
||||
CONFIG_ESP_INT_WDT_CHECK_CPU1=y
|
||||
|
@ -1081,7 +1065,6 @@ CONFIG_STACK_CHECK_NONE=y
|
|||
CONFIG_ESP32_APPTRACE_DEST_NONE=y
|
||||
CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
|
||||
CONFIG_ADC2_DISABLE_DAC=y
|
||||
CONFIG_SPIRAM_SUPPORT=y
|
||||
CONFIG_TRACEMEM_RESERVE_DRAM=0x0
|
||||
# CONFIG_ULP_COPROC_ENABLED is not set
|
||||
CONFIG_ULP_COPROC_RESERVE_MEM=0
|
||||
|
|
|
@ -160,6 +160,7 @@ void sleep_timer_cb(void *arg);
|
|||
#define PSRAM_HSPI_SPIWP_SD3_IO 2
|
||||
#define PSRAM_HSPI_SPIHD_SD2_IO 4
|
||||
|
||||
#ifdef CONFIG_SPIRAM
|
||||
// PSRAM clock and cs IO should be configured based on hardware design.
|
||||
// For ESP32-WROVER or ESP32-WROVER-B module, the clock IO is IO17, the cs IO is IO16,
|
||||
// they are the default value for these two configs.
|
||||
|
@ -180,9 +181,11 @@ void sleep_timer_cb(void *arg);
|
|||
|
||||
#define PICO_V3_02_PSRAM_CLK_IO 10
|
||||
#define PICO_V3_02_PSRAM_CS_IO 9
|
||||
#endif // CONFIG_SPIRAM
|
||||
|
||||
static void _never_reset_spi_ram_flash(void) {
|
||||
#if defined(CONFIG_IDF_TARGET_ESP32)
|
||||
#if defined(CONFIG_SPIRAM)
|
||||
uint32_t pkg_ver = esp_efuse_get_pkg_ver();
|
||||
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
|
||||
never_reset_pin_number(D2WD_PSRAM_CLK_IO);
|
||||
|
@ -202,6 +205,7 @@ static void _never_reset_spi_ram_flash(void) {
|
|||
never_reset_pin_number(D0WDR2_V3_PSRAM_CLK_IO);
|
||||
never_reset_pin_number(D0WDR2_V3_PSRAM_CS_IO);
|
||||
}
|
||||
#endif // CONFIG_SPIRAM
|
||||
|
||||
const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
|
||||
if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) {
|
||||
|
@ -226,7 +230,7 @@ static void _never_reset_spi_ram_flash(void) {
|
|||
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPIHD(spiconfig));
|
||||
never_reset_pin_number(bootloader_flash_get_wp_pin());
|
||||
}
|
||||
#endif
|
||||
#endif // CONFIG_IDF_TARGET_ESP32
|
||||
}
|
||||
|
||||
safe_mode_t port_init(void) {
|
||||
|
|
Loading…
Reference in New Issue