From 0b558e87143b43471c5026b25470dfd8df3a8b13 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 20 Nov 2019 11:34:49 -0500 Subject: [PATCH 1/4] fix error in SPI busclock selection --- ports/stm32f4/common-hal/busio/SPI.c | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index e20bd7a947..f19461e9fa 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -39,6 +39,17 @@ STATIC bool reserved_spi[6]; STATIC bool never_reset_spi[6]; +STATIC uint32_t get_busclock(SPI_TypeDef * instance) { + //SPI2 and 3 are on PCLK1, if they exist. + #ifdef SPI2 + if(instance == SPI2) return HAL_RCC_GetPCLK1Freq(); + #endif + #ifdef SPI3 + if(instance == SPI2) return HAL_RCC_GetPCLK1Freq(); + #endif + return HAL_RCC_GetPCLK2Freq(); +} + void spi_reset(void) { #ifdef SPI1 if(!never_reset_spi[0]) { @@ -205,7 +216,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, { mp_raise_ValueError(translate("SPI Init Error")); } - self->baudrate = (HAL_RCC_GetPCLK2Freq()/16); + self->baudrate = (get_busclock(SPIx)/16); self->prescaler = 16; self->polarity = 0; self->phase = 1; @@ -277,7 +288,7 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { self->miso = mp_const_none; } -static uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler) { +STATIC uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler, uint32_t busclock) { static const uint32_t baud_map[8][2] = { {2,SPI_BAUDRATEPRESCALER_2}, {4,SPI_BAUDRATEPRESCALER_4}, @@ -292,7 +303,7 @@ static uint32_t stm32_baud_to_spi_div(uint32_t baudrate, uint16_t * prescaler) { uint16_t divisor; do { divisor = baud_map[i][0]; - if (baudrate >= (HAL_RCC_GetPCLK2Freq()/divisor)) { + if (baudrate >= (busclock/divisor)) { *prescaler = divisor; return baud_map[i][1]; } @@ -331,9 +342,9 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, } else { self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; } - - self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler); - + + self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler, + get_busclock(self->handle.Instance)); self->handle.Init.Mode = SPI_MODE_MASTER; self->handle.Init.Direction = SPI_DIRECTION_2LINES; self->handle.Init.NSS = SPI_NSS_SOFT; From bd9893ab988ebbb5dd37f9016ddaab2b03abd11c Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 20 Nov 2019 12:00:45 -0500 Subject: [PATCH 2/4] clean up SPI module readability --- ports/stm32f4/common-hal/busio/SPI.c | 201 +++++++++------------------ 1 file changed, 69 insertions(+), 132 deletions(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index f19461e9fa..a4960cce88 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -36,8 +36,13 @@ #include "supervisor/shared/translate.h" #include "common-hal/microcontroller/Pin.h" -STATIC bool reserved_spi[6]; -STATIC bool never_reset_spi[6]; +#define MAX_SPI 6 //TODO; replace this as part of periph cleanup +#define ALL_CLOCKS 0xFF +STATIC bool reserved_spi[MAX_SPI]; +STATIC bool never_reset_spi[MAX_SPI]; + +STATIC void spi_clock_enable(uint8_t mask); +STATIC void spi_clock_disable(uint8_t mask); STATIC uint32_t get_busclock(SPI_TypeDef * instance) { //SPI2 and 3 are on PCLK1, if they exist. @@ -51,42 +56,15 @@ STATIC uint32_t get_busclock(SPI_TypeDef * instance) { } void spi_reset(void) { - #ifdef SPI1 - if(!never_reset_spi[0]) { - reserved_spi[0] = false; - __HAL_RCC_SPI1_CLK_DISABLE(); + uint16_t never_reset_mask = 0x00; + for(int i=0;imiso->altfn_index; HAL_GPIO_Init(pin_port(miso->port), &GPIO_InitStruct); - #ifdef SPI1 - if(SPIx==SPI1) { - reserved_spi[0] = true; - __HAL_RCC_SPI1_CLK_ENABLE(); - } - #endif - #ifdef SPI2 - if(SPIx==SPI2) { - reserved_spi[1] = true; - __HAL_RCC_SPI2_CLK_ENABLE(); - } - #endif - #ifdef SPI3 - if(SPIx==SPI3) { - reserved_spi[2] = true; - __HAL_RCC_SPI3_CLK_ENABLE(); - } - #endif - #ifdef SPI4 - if(SPIx==SPI4) { - reserved_spi[3] = true; - __HAL_RCC_SPI4_CLK_ENABLE(); - } - #endif - #ifdef SPI5 - if(SPIx==SPI5) { - reserved_spi[4] = true; - __HAL_RCC_SPI5_CLK_ENABLE(); - } - #endif - #ifdef SPI6 - if(SPIx==SPI6) { - reserved_spi[5] = true; - __HAL_RCC_SPI6_CLK_ENABLE(); - } - #endif + spi_clock_enable(1<<(self->sck->spi_index - 1)); + reserved_spi[self->sck->spi_index - 1] = true; self->handle.Instance = SPIx; self->handle.Init.Mode = SPI_MODE_MASTER; @@ -244,42 +188,9 @@ bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) { } void common_hal_busio_spi_deinit(busio_spi_obj_t *self) { - #ifdef SPI1 - if(self->handle.Instance==SPI1) { - reserved_spi[0] = false; - __HAL_RCC_SPI1_CLK_DISABLE(); - } - #endif - #ifdef SPI2 - if(self->handle.Instance==SPI2) { - reserved_spi[1] = false; - __HAL_RCC_SPI2_CLK_DISABLE(); - } - #endif - #ifdef SPI3 - if(self->handle.Instance==SPI3) { - reserved_spi[2] = false; - __HAL_RCC_SPI3_CLK_DISABLE(); - } - #endif - #ifdef SPI4 - if(self->handle.Instance==SPI4) { - reserved_spi[3] = false; - __HAL_RCC_SPI4_CLK_DISABLE(); - } - #endif - #ifdef SPI5 - if(self->handle.Instance==SPI5) { - reserved_spi[4] = false; - __HAL_RCC_SPI5_CLK_DISABLE(); - } - #endif - #ifdef SPI6 - if(self->handle.Instance==SPI6) { - reserved_spi[5] = false; - __HAL_RCC_SPI6_CLK_DISABLE(); - } - #endif + spi_clock_disable(1<<(self->sck->spi_index - 1)); + reserved_spi[self->sck->spi_index - 1] = true; + reset_pin_number(self->sck->pin->port,self->sck->pin->number); reset_pin_number(self->mosi->pin->port,self->mosi->pin->number); reset_pin_number(self->miso->pin->port,self->miso->pin->number); @@ -323,26 +234,10 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, //Deinit SPI HAL_SPI_DeInit(&self->handle); - if (bits == 8) { - self->handle.Init.DataSize = SPI_DATASIZE_8BIT; - } else if (bits == 16) { - self->handle.Init.DataSize = SPI_DATASIZE_16BIT; - } else { - return false; - } + self->handle.Init.DataSize = (bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT; + self->handle.Init.CLKPolarity = (polarity) ? SPI_POLARITY_HIGH : SPI_POLARITY_LOW; + self->handle.Init.CLKPhase = (phase) ? SPI_PHASE_2EDGE : SPI_PHASE_1EDGE; - if (polarity) { - self->handle.Init.CLKPolarity = SPI_POLARITY_HIGH; - } else { - self->handle.Init.CLKPolarity = SPI_POLARITY_LOW; - } - - if (phase) { - self->handle.Init.CLKPhase = SPI_PHASE_2EDGE; - } else { - self->handle.Init.CLKPhase = SPI_PHASE_1EDGE; - } - self->handle.Init.BaudRatePrescaler = stm32_baud_to_spi_div(baudrate, &self->prescaler, get_busclock(self->handle.Instance)); self->handle.Init.Mode = SPI_MODE_MASTER; @@ -373,10 +268,10 @@ bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) { // __disable_irq(); // __DMB(); - if (!self->has_lock) { - grabbed_lock = true; - self->has_lock = true; - } + if (!self->has_lock) { + grabbed_lock = true; + self->has_lock = true; + } // __DMB(); // __set_PRIMASK(store_primask); @@ -423,4 +318,46 @@ uint8_t common_hal_busio_spi_get_phase(busio_spi_obj_t* self) { uint8_t common_hal_busio_spi_get_polarity(busio_spi_obj_t* self) { return self->polarity; +} + +STATIC void spi_clock_enable(uint8_t mask) { + #ifdef SPI1 + if (mask & 1<<0) __HAL_RCC_SPI1_CLK_ENABLE(); + #endif + #ifdef SPI2 + if (mask & 1<<1) __HAL_RCC_SPI2_CLK_ENABLE(); + #endif + #ifdef SPI3 + if (mask & 1<<2) __HAL_RCC_SPI3_CLK_ENABLE(); + #endif + #ifdef SPI4 + if (mask & 1<<3) __HAL_RCC_SPI4_CLK_ENABLE(); + #endif + #ifdef SPI5 + if (mask & 1<<4) __HAL_RCC_SPI5_CLK_ENABLE(); + #endif + #ifdef SPI6 + if (mask & 1<<5) __HAL_RCC_SPI6_CLK_ENABLE(); + #endif +} + +STATIC void spi_clock_disable(uint8_t mask) { + #ifdef SPI1 + if (mask & 1<<0) __HAL_RCC_SPI1_CLK_DISABLE(); + #endif + #ifdef SPI2 + if (mask & 1<<1) __HAL_RCC_SPI2_CLK_DISABLE(); + #endif + #ifdef SPI3 + if (mask & 1<<2) __HAL_RCC_SPI3_CLK_DISABLE(); + #endif + #ifdef SPI4 + if (mask & 1<<3) __HAL_RCC_SPI4_CLK_DISABLE(); + #endif + #ifdef SPI5 + if (mask & 1<<4) __HAL_RCC_SPI5_CLK_DISABLE(); + #endif + #ifdef SPI6 + if (mask & 1<<5) __HAL_RCC_SPI6_CLK_DISABLE(); + #endif } \ No newline at end of file From 3d1b6d9fc8f1fd30acaf75ab10acba792873b8f7 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Wed, 20 Nov 2019 12:07:12 -0500 Subject: [PATCH 3/4] fix typo --- ports/stm32f4/common-hal/busio/SPI.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index a4960cce88..f98d29054d 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -50,7 +50,7 @@ STATIC uint32_t get_busclock(SPI_TypeDef * instance) { if(instance == SPI2) return HAL_RCC_GetPCLK1Freq(); #endif #ifdef SPI3 - if(instance == SPI2) return HAL_RCC_GetPCLK1Freq(); + if(instance == SPI3) return HAL_RCC_GetPCLK1Freq(); #endif return HAL_RCC_GetPCLK2Freq(); } From a96317d5662476023a4d297f5304edca1832c269 Mon Sep 17 00:00:00 2001 From: Hierophect Date: Thu, 21 Nov 2019 14:30:07 -0500 Subject: [PATCH 4/4] requested style changes --- ports/stm32f4/common-hal/busio/SPI.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c index f98d29054d..b5517f470f 100644 --- a/ports/stm32f4/common-hal/busio/SPI.c +++ b/ports/stm32f4/common-hal/busio/SPI.c @@ -38,6 +38,8 @@ #define MAX_SPI 6 //TODO; replace this as part of periph cleanup #define ALL_CLOCKS 0xFF + +//arrays use 0 based numbering: SPI1 is stored at index 0 STATIC bool reserved_spi[MAX_SPI]; STATIC bool never_reset_spi[MAX_SPI]; @@ -360,4 +362,4 @@ STATIC void spi_clock_disable(uint8_t mask) { #ifdef SPI6 if (mask & 1<<5) __HAL_RCC_SPI6_CLK_DISABLE(); #endif -} \ No newline at end of file +}