Revert modules with missed dependence

This commit is contained in:
Hierophect 2019-10-04 15:01:33 -04:00
parent dc4abb922b
commit e017a5925d

View File

@ -203,7 +203,7 @@ endif
CFLAGS += -DCIRCUITPY_PS2IO=$(CIRCUITPY_PS2IO)
ifndef CIRCUITPY_RANDOM
CIRCUITPY_RANDOM = $(CIRCUITPY_ALWAYS_BUILD)
CIRCUITPY_RANDOM = $(CIRCUITPY_DEFAULT_BUILD)
endif
CFLAGS += -DCIRCUITPY_RANDOM=$(CIRCUITPY_RANDOM)
@ -232,7 +232,7 @@ endif
CFLAGS += -DCIRCUITPY_STAGE=$(CIRCUITPY_STAGE)
ifndef CIRCUITPY_STORAGE
CIRCUITPY_STORAGE = $(CIRCUITPY_ALWAYS_BUILD)
CIRCUITPY_STORAGE = $(CIRCUITPY_DEFAULT_BUILD)
endif
CFLAGS += -DCIRCUITPY_STORAGE=$(CIRCUITPY_STORAGE)
@ -269,12 +269,12 @@ endif
CFLAGS += -DCIRCUITPY_UHEAP=$(CIRCUITPY_UHEAP)
ifndef CIRCUITPY_USB_HID
CIRCUITPY_USB_HID = $(CIRCUITPY_ALWAYS_BUILD)
CIRCUITPY_USB_HID = $(CIRCUITPY_DEFAULT_BUILD)
endif
CFLAGS += -DCIRCUITPY_USB_HID=$(CIRCUITPY_USB_HID)
ifndef CIRCUITPY_USB_MIDI
CIRCUITPY_USB_MIDI = $(CIRCUITPY_ALWAYS_BUILD)
CIRCUITPY_USB_MIDI = $(CIRCUITPY_DEFAULT_BUILD)
endif
CFLAGS += -DCIRCUITPY_USB_MIDI=$(CIRCUITPY_USB_MIDI)