Merge pull request #2105 from arturo182/GD25Q32C
Add GD25Q32C flash device definition
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@ -66,7 +66,7 @@ typedef struct {
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bool single_status_byte: 1;
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} external_flash_device;
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// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. Its on the SAMD21
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// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21
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// Xplained board.
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// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8715.pdf
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#define AT25DF081A {\
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@ -103,6 +103,24 @@ typedef struct {
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.single_status_byte = false, \
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}
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// Settings for the Gigadevice GD25Q32C 4MiB SPI flash.
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// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q32/gd25q32.pdf
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#define GD25Q32C {\
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.total_size = (1 << 22), /* 4 MiB */ \
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.start_up_time_us = 5000, \
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.manufacturer_id = 0xc8, \
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.memory_type = 0x40, \
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.capacity = 0x16, \
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.max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \
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.quad_enable_bit_mask = 0x02, \
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.has_sector_protection = false, \
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.supports_fast_read = true, \
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.supports_qspi = true, \
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.supports_qspi_writes = true, \
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.write_status_register_split = true, \
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.single_status_byte = false, \
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}
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// Settings for the Gigadevice GD25Q64C 8MiB SPI flash.
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// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q64/gd25q64.pdf
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#define GD25Q64C {\
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