minor WIP debug edits

ports/stm32f4/Makefile

@@ -22,7 +22,7 @@
 # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 # OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 # THE SOFTWARE.
-DEBUG = 1
+#DEBUG = 1
 
 # Select the board to build for.
 ifeq ($(BOARD),)
@@ -85,6 +85,7 @@ ifeq ($(DEBUG), 1)
   CFLAGS += -fno-inline -fno-ipa-sra
 else
   CFLAGS += -Os -DNDEBUG
+  CFLAGS += -ggdb
   # TODO: Test with -flto
   ### CFLAGS += -flto
 endif
@@ -256,7 +257,7 @@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf
 
 $(BUILD)/firmware.uf2: $(BUILD)/firmware.hex
 	$(ECHO) "Create $@"
-	$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08000000 -c -o "$(BUILD)/firmware.uf2" $^
+	$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b 0x08010000 -c -o "$(BUILD)/firmware.uf2" $^
 
 include $(TOP)/py/mkrules.mk
 

ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk

@@ -17,5 +17,5 @@ MCU_VARIANT = stm32f4
 MCU_SUB_VARIANT = stm32f401xe
 MCU_PACKAGE = 64
 CMSIS_MCU = STM32F401xE
-# LD_FILE = boards/STM32F401_boot.ld 
-LD_FILE = boards/STM32F401_fs.ld
+LD_FILE = boards/STM32F401_boot.ld 
+#LD_FILE = boards/STM32F401_fs.ld

ports/stm32f4/boards/openocd_stm32f4.cfg

@@ -0,0 +1,44 @@
+# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger
+# and an STM32F4 target microcontroller.
+#
+# To flash your firmware:
+#
+#    $ openocd -f openocd_stm32f4.cfg \
+#        -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08020000"
+#
+# For a gdb server on port 3333:
+#
+#    $ openocd -f openocd_stm32f4.cfg
+
+
+source [find interface/stlink-v2.cfg]
+transport select hla_swd
+source [find target/stm32f4x.cfg]
+reset_config srst_only
+init
+
+proc stm_flash { BIN0 ADDR0 {BIN1 ""} {ADDR1 ""} } {
+    reset halt
+    sleep 100
+    wait_halt 2
+    flash write_image erase $BIN0 $ADDR0
+    sleep 100
+    verify_image $BIN0 $ADDR0
+    sleep 100
+    if {$BIN1 ne ""} {
+        flash write_image erase $BIN1 $ADDR1
+        sleep 100
+        verify_image $BIN1 $ADDR1
+        sleep 100
+    }
+    reset run
+    shutdown
+}
+
+proc stm_erase {} {
+    reset halt
+    sleep 100
+    stm32f4x mass_erase 0
+    sleep 100
+    shutdown
+}

ports/stm32f4/supervisor/usb.c

@@ -105,6 +105,7 @@ void init_usb_hardware(void) {
 #endif
     
     /* Peripheral clock enable */
+    __HAL_RCC_USB_OTG_FS_CLK_DISABLE();
     __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 
     init_usb_vbus_sense();