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Merge pull request #2964 from hierophect/mimxrt-busio-cleanup 

mimxrt10xx: Busio cleanup and bugfixes
This commit is contained in:
Scott Shawcroft 2020-05-29 10:42:16 -07:00 committed by GitHub
parent 7ea95457ee fe75c7793c
commit ddcae19254
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
19 changed files with 183 additions and 72 deletions
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1
ports/mimxrt10xx/boards/imxrt1010_evk/board.c
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@ -33,7 +33,6 @@ void board_init(void) {
// SWD Pins
common_hal_never_reset_pin(&pin_GPIO_AD_13); //SWDIO
common_hal_never_reset_pin(&pin_GPIO_AD_12); //SWCLK
common_hal_never_reset_pin(&pin_GPIO_AD_09); //SWO
// FLEX flash
common_hal_never_reset_pin(&pin_GPIO_SD_12);
common_hal_never_reset_pin(&pin_GPIO_SD_11);

4
ports/mimxrt10xx/boards/imxrt1010_evk/mpconfigboard.h
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@ -7,6 +7,10 @@
#define BOARD_FLASH_SIZE (16 * 1024 * 1024)
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO_AD_06)
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO_AD_04)
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO_AD_03)
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO_02)
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO_01)

14
ports/mimxrt10xx/boards/imxrt1010_evk/pins.c
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@ -4,9 +4,7 @@
STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO_09) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO_10) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO_AD_05) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO_AD_06) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO_08) },
@ -20,9 +18,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO_AD_03) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO_AD_06) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO_01) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO_02) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO_AD_07) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO_AD_09) },
@ -31,6 +27,16 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO_AD_01) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO_AD_02) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO_09) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO_10) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO_AD_04) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO_AD_03) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO_AD_06) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO_01) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO_02) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_USER_LED), MP_ROM_PTR(&pin_GPIO_11) },
{ MP_OBJ_NEW_QSTR(MP_QSTR_USER_SW), MP_ROM_PTR(&pin_GPIO_SD_05) },

1
ports/mimxrt10xx/boards/imxrt1020_evk/board.c
View File

@ -33,7 +33,6 @@ void board_init(void) {
// SWD Pins
common_hal_never_reset_pin(&pin_GPIO_AD_B0_00);//SWDIO
common_hal_never_reset_pin(&pin_GPIO_AD_B0_01);//SWCLK
common_hal_never_reset_pin(&pin_GPIO_AD_B0_04);//SWO
// FLEX flash
common_hal_never_reset_pin(&pin_GPIO_SD_B1_06);

1
ports/mimxrt10xx/boards/imxrt1060_evk/board.c
View File

@ -33,7 +33,6 @@ void board_init(void) {
// SWD Pins
common_hal_never_reset_pin(&pin_GPIO_AD_B0_06);//SWDIO
common_hal_never_reset_pin(&pin_GPIO_AD_B0_07);//SWCLK
common_hal_never_reset_pin(&pin_GPIO_AD_B0_10);//SWO
// FLEX flash
common_hal_never_reset_pin(&pin_GPIO_SD_B1_00);

109
ports/mimxrt10xx/common-hal/busio/I2C.c
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@ -27,15 +27,32 @@
#include <stdio.h>
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/busio/I2C.h"
#include "py/mperrno.h"
#include "py/runtime.h"
#include "periph.h"
#include "fsl_lpi2c.h"
#include "fsl_gpio.h"
#define I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (1+CLOCK_GetDiv(kCLOCK_Lpi2cDiv)))
#define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5 5U
//arrays use 0 based numbering: I2C1 is stored at index 0
#define MAX_I2C 4
STATIC bool reserved_i2c[MAX_I2C];
STATIC bool never_reset_i2c[MAX_I2C];
void i2c_reset(void) {
for(uint i = 0; i < MP_ARRAY_SIZE(mcu_i2c_banks); i++) {
if (!never_reset_i2c[i]) {
reserved_i2c[i] = false;
LPI2C_MasterDeinit(mcu_i2c_banks[i]);
}
}
}
static void config_periph_pin(const mcu_periph_obj_t *periph) {
IOMUXC_SetPinMux(
@ -56,11 +73,49 @@ static void config_periph_pin(const mcu_periph_obj_t *periph) {
| IOMUXC_SW_PAD_CTL_PAD_SRE(0));
}
static void i2c_check_pin_config(const mcu_pin_obj_t *pin, uint32_t pull)
{
IOMUXC_SetPinConfig(0, 0, 0, 0, pin->cfg_reg,
IOMUXC_SW_PAD_CTL_PAD_HYS(1)
| IOMUXC_SW_PAD_CTL_PAD_PUS(0) // Pulldown
| IOMUXC_SW_PAD_CTL_PAD_PUE(pull) // 0=nopull (keeper), 1=pull
| IOMUXC_SW_PAD_CTL_PAD_PKE(1)
| IOMUXC_SW_PAD_CTL_PAD_ODE(0)
| IOMUXC_SW_PAD_CTL_PAD_SPEED(2)
| IOMUXC_SW_PAD_CTL_PAD_DSE(1)
| IOMUXC_SW_PAD_CTL_PAD_SRE(0));
}
void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) {
const uint32_t sda_count = sizeof(mcu_i2c_sda_list) / sizeof(mcu_periph_obj_t);
const uint32_t scl_count = sizeof(mcu_i2c_scl_list) / sizeof(mcu_periph_obj_t);
#if CIRCUITPY_REQUIRE_I2C_PULLUPS
// Test that the pins are in a high state. (Hopefully indicating they are pulled up.)
IOMUXC_SetPinMux(sda->mux_reg, IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5, 0, 0, 0, 0);
IOMUXC_SetPinMux(scl->mux_reg, IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_ALT5, 0, 0, 0, 0);
i2c_check_pin_config(sda, 1);
i2c_check_pin_config(scl, 1);
const gpio_pin_config_t check_config = { kGPIO_DigitalInput, 0, kGPIO_NoIntmode };
GPIO_PinInit(sda->gpio, sda->number, &check_config);
GPIO_PinInit(scl->gpio, scl->number, &check_config);
common_hal_mcu_delay_us(10);
i2c_check_pin_config(sda, 0);
i2c_check_pin_config(scl, 0);
// We must pull up within 3us to achieve 400khz.
common_hal_mcu_delay_us(3);
if( !GPIO_PinRead(sda->gpio, sda->number) || !GPIO_PinRead(scl->gpio, scl->number)) {
common_hal_reset_pin(sda);
common_hal_reset_pin(scl);
mp_raise_RuntimeError(translate("SDA or SCL needs a pull up"));
}
#endif
const uint32_t sda_count = MP_ARRAY_SIZE(mcu_i2c_sda_list);
const uint32_t scl_count = MP_ARRAY_SIZE(mcu_i2c_scl_list);
for (uint32_t i = 0; i < sda_count; ++i) {
if (mcu_i2c_sda_list[i].pin != sda)
@ -73,21 +128,21 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
if (mcu_i2c_scl_list[j].bank_idx != mcu_i2c_sda_list[i].bank_idx)
continue;
self->sda_pin = &mcu_i2c_sda_list[i];
self->scl_pin = &mcu_i2c_scl_list[j];
self->sda = &mcu_i2c_sda_list[i];
self->scl = &mcu_i2c_scl_list[j];
break;
}
}
if(self->sda_pin == NULL || self->scl_pin == NULL) {
mp_raise_ValueError(translate("Invalid I2C pin selection"));
if(self->sda == NULL || self->scl == NULL) {
mp_raise_ValueError(translate("Invalid pins"));
} else {
self->i2c = mcu_i2c_banks[self->sda_pin->bank_idx - 1];
self->i2c = mcu_i2c_banks[self->sda->bank_idx - 1];
}
config_periph_pin(self->sda_pin);
config_periph_pin(self->scl_pin);
config_periph_pin(self->sda);
config_periph_pin(self->scl);
lpi2c_master_config_t config = { 0 };
LPI2C_MasterGetDefaultConfig(&config);
@ -96,34 +151,35 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
LPI2C_MasterInit(self->i2c, &config, I2C_CLOCK_FREQ);
#if CIRCUITPY_REQUIRE_I2C_PULLUPS
// if (!gpio_get_pin_level(sda->number) || !gpio_get_pin_level(scl->number)) {
// reset_pin_number(sda->number);
// reset_pin_number(scl->number);
// mp_raise_RuntimeError(translate("SDA or SCL needs a pull up"));
// }
#endif
claim_pin(self->sda->pin);
claim_pin(self->scl->pin);
}
claim_pin(self->sda_pin->pin);
claim_pin(self->scl_pin->pin);
void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) {
never_reset_i2c[self->sda->bank_idx - 1] = true;
common_hal_never_reset_pin(self->sda->pin);
common_hal_never_reset_pin(self->scl->pin);
}
bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) {
return self->sda_pin == NULL;
return self->sda == NULL;
}
void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) {
if (common_hal_busio_i2c_deinited(self)) {
return;
}
reserved_i2c[self->sda->bank_idx - 1] = false;
never_reset_i2c[self->sda->bank_idx - 1] = false;
LPI2C_MasterDeinit(self->i2c);
// reset_pin_number(self->sda_pin);
// reset_pin_number(self->scl_pin);
common_hal_reset_pin(self->sda->pin);
common_hal_reset_pin(self->scl->pin);
self->sda_pin = NULL;
self->scl_pin = NULL;
self->sda = NULL;
self->scl = NULL;
}
bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
@ -183,10 +239,3 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr,
return MP_EIO;
}
void common_hal_busio_i2c_never_reset(busio_i2c_obj_t *self) {
// never_reset_sercom(self->i2c_desc.device.hw);
//
// never_reset_pin_number(self->scl_pin);
// never_reset_pin_number(self->sda_pin);
}

4
ports/mimxrt10xx/common-hal/busio/I2C.h
View File

@ -37,8 +37,8 @@ typedef struct {
mp_obj_base_t base;
LPI2C_Type *i2c;
bool has_lock;
const mcu_periph_obj_t *scl_pin;
const mcu_periph_obj_t *sda_pin;
const mcu_periph_obj_t *scl;
const mcu_periph_obj_t *sda;
} busio_i2c_obj_t;
#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_BUSIO_I2C_H

34
ports/mimxrt10xx/common-hal/busio/SPI.c
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@ -25,6 +25,8 @@
* THE SOFTWARE.
*/
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/busio/SPI.h"
#include "py/mperrno.h"
#include "py/runtime.h"
@ -34,6 +36,8 @@
#include <stdio.h>
#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1))
//arrays use 0 based numbering: SPI1 is stored at index 0
#define MAX_SPI 4
STATIC bool reserved_spi[MAX_SPI];
@ -58,11 +62,12 @@ STATIC void config_periph_pin(const mcu_periph_obj_t *periph) {
| IOMUXC_SW_PAD_CTL_PAD_SRE(0));
}
#define LPSPI_MASTER_CLK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk) / (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1))
void spi_reset(void) {
for (int i = 0; i < MAX_SPI; i++) {
reserved_spi[i] = false;
for (uint i = 0; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) {
if (!never_reset_spi[i]) {
reserved_spi[i] = false;
LPSPI_Deinit(mcu_spi_banks[i]);
}
}
}
@ -192,7 +197,14 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
}
void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
// TODO
never_reset_spi[self->clock->bank_idx - 1] = true;
common_hal_never_reset_pin(self->clock->pin);
if (self->mosi != NULL) {
common_hal_never_reset_pin(self->mosi->pin);
}
if (self->miso != NULL) {
common_hal_never_reset_pin(self->miso->pin);
}
}
bool common_hal_busio_spi_deinited(busio_spi_obj_t *self) {
@ -203,8 +215,20 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
if (common_hal_busio_spi_deinited(self)) {
return;
}
LPSPI_Deinit(self->spi);
reserved_spi[self->clock->bank_idx - 1] = false;
never_reset_spi[self->clock->bank_idx - 1] = false;
common_hal_reset_pin(self->clock->pin);
if (self->mosi != NULL) {
common_hal_reset_pin(self->mosi->pin);
}
if (self->miso != NULL) {
common_hal_reset_pin(self->miso->pin);
}
self->clock = NULL;
self->mosi = NULL;
self->miso = NULL;
}
bool common_hal_busio_spi_configure(busio_spi_obj_t *self,

24
ports/mimxrt10xx/common-hal/busio/UART.c
View File

@ -25,6 +25,7 @@
* THE SOFTWARE.
*/
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "shared-bindings/busio/UART.h"
@ -73,6 +74,13 @@ void LPUART_UserCallback(LPUART_Type *base, lpuart_handle_t *handle, status_t st
}
}
void uart_reset(void) {
for(uint i = 0; i < MP_ARRAY_SIZE(mcu_uart_banks); i++) {
reserved_uart[i] = false;
LPUART_Deinit(mcu_uart_banks[i]);
}
}
void common_hal_busio_uart_construct(busio_uart_obj_t *self,
const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx,
const mcu_pin_obj_t * rts, const mcu_pin_obj_t * cts,
@ -278,13 +286,21 @@ void common_hal_busio_uart_deinit(busio_uart_obj_t *self) {
if (common_hal_busio_uart_deinited(self)) {
return;
}
if (self->rx) {
reserved_uart[self->rx->bank_idx - 1] = false;
} else {
reserved_uart[self->tx->bank_idx - 1] = false;
}
LPUART_Deinit(self->uart);
gc_free(self->ringbuf);
// reset_pin_number(self->rx);
// reset_pin_number(self->tx);
if (self->rx) {
common_hal_reset_pin(self->rx->pin);
}
if (self->tx) {
common_hal_reset_pin(self->tx->pin);
}
self->rx = NULL;
self->tx = NULL;

1
ports/mimxrt10xx/common-hal/microcontroller/Pin.c
View File

@ -5,6 +5,7 @@
*
* Copyright (c) 2016 Scott Shawcroft for Adafruit Industries
* Copyright (c) 2019 Artur Pacholec
* Copyright (c) 2020 Lucian Copeland for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal

6
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c
View File

@ -29,7 +29,7 @@
#include "py/mphal.h"
#include "mimxrt10xx/periph.h"
LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2 };
LPI2C_Type *mcu_i2c_banks[2] = { LPI2C1, LPI2C2 };
const mcu_periph_obj_t mcu_i2c_sda_list[8] = {
PERIPH_PIN(1, 0, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_AD_13),
@ -55,7 +55,7 @@ const mcu_periph_obj_t mcu_i2c_scl_list[8] = {
PERIPH_PIN(2, 3, kIOMUXC_LPI2C2_SCL_SELECT_INPUT, 3, &pin_GPIO_10),
};
LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2 };
LPSPI_Type *mcu_spi_banks[2] = { LPSPI1, LPSPI2 };
const mcu_periph_obj_t mcu_spi_sck_list[4] = {
PERIPH_PIN(1, 0, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_AD_06),
@ -81,7 +81,7 @@ const mcu_periph_obj_t mcu_spi_miso_list[4] = {
PERIPH_PIN(2, 1, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_SD_09),
};
LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4 };
LPUART_Type *mcu_uart_banks[4] = { LPUART1, LPUART2, LPUART3, LPUART4 };
const mcu_periph_obj_t mcu_uart_rx_list[9] = {
PERIPH_PIN(1, 2, kIOMUXC_LPUART1_RXD_SELECT_INPUT, 0, &pin_GPIO_SD_11),

6
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.h
View File

@ -27,13 +27,19 @@
#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H
#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H
LPI2C_Type *mcu_i2c_banks[2];
extern const mcu_periph_obj_t mcu_i2c_sda_list[8];
extern const mcu_periph_obj_t mcu_i2c_scl_list[8];
LPSPI_Type *mcu_spi_banks[2];
extern const mcu_periph_obj_t mcu_spi_sck_list[4];
extern const mcu_periph_obj_t mcu_spi_mosi_list[4];
extern const mcu_periph_obj_t mcu_spi_miso_list[4];
LPUART_Type *mcu_uart_banks[4];
extern const mcu_periph_obj_t mcu_uart_rx_list[9];
extern const mcu_periph_obj_t mcu_uart_tx_list[9];
extern const mcu_periph_obj_t mcu_uart_rts_list[4];

6
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c
View File

@ -30,7 +30,7 @@
#include "py/mphal.h"
#include "mimxrt10xx/periph.h"
LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 };
LPI2C_Type *mcu_i2c_banks[4] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 };
const mcu_periph_obj_t mcu_i2c_sda_list[8] = {
PERIPH_PIN(1, 6, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_EMC_03),
@ -60,7 +60,7 @@ const mcu_periph_obj_t mcu_i2c_scl_list[8] = {
PERIPH_PIN(4, 3, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_SD_B1_02),
};
LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 };
LPSPI_Type *mcu_spi_banks[4] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 };
const mcu_periph_obj_t mcu_spi_sck_list[8] = {
PERIPH_PIN(1, 4, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_SD_B0_02),
@ -104,7 +104,7 @@ const mcu_periph_obj_t mcu_spi_miso_list[8] = {
PERIPH_PIN(4, 4, kIOMUXC_LPSPI2_SDI_SELECT_INPUT, 1, &pin_GPIO_EMC_35),
};
LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 };
LPUART_Type *mcu_uart_banks[8] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 };
const mcu_periph_obj_t mcu_uart_rx_list[16] = {
PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_07),

6
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.h
View File

@ -28,13 +28,19 @@
#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H
#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1021_PERIPH_H
LPI2C_Type *mcu_i2c_banks[4];
extern const mcu_periph_obj_t mcu_i2c_sda_list[8];
extern const mcu_periph_obj_t mcu_i2c_scl_list[8];
LPSPI_Type *mcu_spi_banks[4];
extern const mcu_periph_obj_t mcu_spi_sck_list[8];
extern const mcu_periph_obj_t mcu_spi_mosi_list[8];
extern const mcu_periph_obj_t mcu_spi_miso_list[8];
LPUART_Type *mcu_uart_banks[8];
extern const mcu_periph_obj_t mcu_uart_rx_list[16];
extern const mcu_periph_obj_t mcu_uart_tx_list[16];
extern const mcu_periph_obj_t mcu_uart_rts_list[10];

6
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c
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@ -29,7 +29,7 @@
#include "py/mphal.h"
#include "mimxrt10xx/periph.h"
LPI2C_Type *mcu_i2c_banks[] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 };
LPI2C_Type *mcu_i2c_banks[4] = { LPI2C1, LPI2C2, LPI2C3, LPI2C4 };
const mcu_periph_obj_t mcu_i2c_sda_list[9] = {
PERIPH_PIN(1, 2, kIOMUXC_LPI2C1_SDA_SELECT_INPUT, 0, &pin_GPIO_SD_B1_05),
@ -61,7 +61,7 @@ const mcu_periph_obj_t mcu_i2c_scl_list[9] = {
PERIPH_PIN(4, 0, kIOMUXC_LPI2C4_SCL_SELECT_INPUT, 1, &pin_GPIO_AD_B0_12),
};
LPSPI_Type *mcu_spi_banks[] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 };
LPSPI_Type *mcu_spi_banks[4] = { LPSPI1, LPSPI2, LPSPI3, LPSPI4 };
const mcu_periph_obj_t mcu_spi_sck_list[8] = {
PERIPH_PIN(1, 3, kIOMUXC_LPSPI1_SCK_SELECT_INPUT, 0, &pin_GPIO_EMC_27),
@ -105,7 +105,7 @@ const mcu_periph_obj_t mcu_spi_miso_list[8] = {
PERIPH_PIN(4, 1, kIOMUXC_LPSPI4_SDI_SELECT_INPUT, 1, &pin_GPIO_B1_05),
};
LPUART_Type *mcu_uart_banks[] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 };
LPUART_Type *mcu_uart_banks[8] = { LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 };
const mcu_periph_obj_t mcu_uart_rx_list[18] = {
PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B0_13),

6
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h
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@ -27,13 +27,19 @@
#ifndef MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H
#define MICROPY_INCLUDED_MIMXRT10XX_PERIPHERALS_MIMXRT1011_PERIPH_H
LPI2C_Type *mcu_i2c_banks[4];
extern const mcu_periph_obj_t mcu_i2c_sda_list[9];
extern const mcu_periph_obj_t mcu_i2c_scl_list[9];
LPSPI_Type *mcu_spi_banks[4];
extern const mcu_periph_obj_t mcu_spi_sck_list[8];
extern const mcu_periph_obj_t mcu_spi_mosi_list[8];
extern const mcu_periph_obj_t mcu_spi_miso_list[8];
LPUART_Type *mcu_uart_banks[8];
extern const mcu_periph_obj_t mcu_uart_rx_list[18];
extern const mcu_periph_obj_t mcu_uart_tx_list[18];
extern const mcu_periph_obj_t mcu_uart_rts_list[9];

4
ports/mimxrt10xx/supervisor/port.c
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@ -257,8 +257,8 @@ safe_mode_t port_init(void) {
// enabled. It won't occur very often so it'll be low overhead.
NVIC_EnableIRQ(SNVS_HP_WRAPPER_IRQn);
// Reset everything into a known state before board_init.
reset_port();
// Note that `reset_port` CANNOT GO HERE, unlike other ports, because `board_init` hasn't been
// run yet, which uses `never_reset` to protect critical pins from being reset by `reset_port`.
if (board_requests_safe_mode()) {
return USER_SAFE_MODE;

2
ports/stm/common-hal/busio/I2C.c
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@ -122,7 +122,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
#if (CPY_STM32H7 || CPY_STM32F7)
self->handle.Init.Timing = 0x40604E73; //Taken from STCube examples
#else
self->handle.Init.ClockSpeed = 100000;
self->handle.Init.ClockSpeed = frequency;
self->handle.Init.DutyCycle = I2C_DUTYCYCLE_2;
#endif

20
ports/stm/common-hal/busio/SPI.c
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@ -269,18 +269,14 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
}
void common_hal_busio_spi_never_reset(busio_spi_obj_t *self) {
for (size_t i = 0; i < MP_ARRAY_SIZE(mcu_spi_banks); i++) {
if (mcu_spi_banks[i] == self->handle.Instance) {
never_reset_spi[i] = true;
never_reset_pin_number(self->sck->pin->port, self->sck->pin->number);
if (self->mosi != NULL) {
never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number);
}
if (self->miso != NULL) {
never_reset_pin_number(self->miso->pin->port, self->miso->pin->number);
}
break;
}
never_reset_spi[self->sck->periph_index - 1] = true;
never_reset_pin_number(self->sck->pin->port, self->sck->pin->number);
if (self->mosi != NULL) {
never_reset_pin_number(self->mosi->pin->port, self->mosi->pin->number);
}
if (self->miso != NULL) {
never_reset_pin_number(self->miso->pin->port, self->miso->pin->number);
}
}