Support gathering register values on nrf.
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parent
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commit
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2
ports/nrf/Makefile
Normal file → Executable file
2
ports/nrf/Makefile
Normal file → Executable file
@ -213,7 +213,7 @@ FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py')
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FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy))
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OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(BUILD)/pins_gen.o
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OBJ += $(BUILD)/pins_gen.o supervisor/cpu.o
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OBJ += $(addprefix $(BUILD)/, $(SRC_HAL:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_NRFX:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
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27
ports/nrf/supervisor/cpu.s
Executable file
27
ports/nrf/supervisor/cpu.s
Executable file
@ -0,0 +1,27 @@
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.syntax unified
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.cpu cortex-m4
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.thumb
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.text
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.align 2
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@ uint cpu_get_regs_and_sp(r0=uint regs[10])
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.global cpu_get_regs_and_sp
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.thumb
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.thumb_func
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.type cpu_get_regs_and_sp, %function
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cpu_get_regs_and_sp:
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@ store registers into given array
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str r4, [r0], #4
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str r5, [r0], #4
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str r6, [r0], #4
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str r7, [r0], #4
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str r8, [r0], #4
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str r9, [r0], #4
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str r10, [r0], #4
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str r11, [r0], #4
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str r12, [r0], #4
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str r13, [r0], #4
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@ return the sp
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mov r0, sp
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bx lr
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