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stm32: Fix to build in nanbox mode.

This commit is contained in:
Damien George 2019-12-27 22:46:43 +11:00
parent e83fc3260e
commit d980d51807
8 changed files with 12 additions and 11 deletions
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2
ports/stm32/machine_i2c.c
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@ -203,7 +203,7 @@ mp_obj_t machine_hard_i2c_make_new(const mp_obj_type_t *type, size_t n_args, siz
{ MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 400000} },
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = I2C_POLL_DEFAULT_TIMEOUT_US} },
#if MACHINE_I2C_TIMINGR
{ MP_QSTR_timingr, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_timingr, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
#endif
};
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];

6
ports/stm32/machine_timer.c
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@ -33,7 +33,7 @@ typedef soft_timer_entry_t machine_timer_obj_t;
const mp_obj_type_t machine_timer_type;
STATIC void machine_timer_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
machine_timer_obj_t *self = self_in;
machine_timer_obj_t *self = MP_OBJ_TO_PTR(self_in);
qstr mode = self->mode == SOFT_TIMER_MODE_ONE_SHOT ? MP_QSTR_ONE_SHOT : MP_QSTR_PERIODIC;
mp_printf(print, "Timer(mode=%q, period=%u)", mode, self->delta_ms);
}
@ -42,10 +42,10 @@ STATIC mp_obj_t machine_timer_init_helper(machine_timer_obj_t *self, size_t n_ar
enum { ARG_mode, ARG_callback, ARG_period, ARG_tick_hz, ARG_freq, };
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_mode, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = SOFT_TIMER_MODE_PERIODIC} },
{ MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_callback, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
{ MP_QSTR_period, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0xffffffff} },
{ MP_QSTR_tick_hz, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} },
{ MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_freq, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
};
// Parse args

2
ports/stm32/mpconfigport.h
View File

@ -301,7 +301,7 @@ struct _mp_bluetooth_nimble_root_pointers_t;
// type definitions for the specific machine
#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p) | 1))
#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((uint32_t)(p) | 1))
#define MP_SSIZE_MAX (0x7fffffff)

5
ports/stm32/mphalport.c
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@ -23,9 +23,10 @@ NORETURN void mp_hal_raise(HAL_StatusTypeDef status) {
MP_WEAK uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) {
uintptr_t ret = 0;
if (MP_STATE_PORT(pyb_stdio_uart) != NULL) {
mp_obj_t pyb_stdio_uart = MP_OBJ_FROM_PTR(MP_STATE_PORT(pyb_stdio_uart));
int errcode;
const mp_stream_p_t *stream_p = mp_get_stream(MP_STATE_PORT(pyb_stdio_uart));
ret = stream_p->ioctl(MP_STATE_PORT(pyb_stdio_uart), MP_STREAM_POLL, poll_flags, &errcode);
const mp_stream_p_t *stream_p = mp_get_stream(pyb_stdio_uart);
ret = stream_p->ioctl(pyb_stdio_uart, MP_STREAM_POLL, poll_flags, &errcode);
}
return ret | mp_uos_dupterm_poll(poll_flags);
}

2
ports/stm32/nimble_hci_uart.c
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@ -109,7 +109,7 @@ int nimble_hci_uart_configure(uint32_t port) {
int nimble_hci_uart_activate(void) {
// Interrupt on RX chunk received (idle)
// Trigger nimble poll when this happens
mp_obj_t uart_irq_fn = mp_load_attr(&bt_hci_uart_obj, MP_QSTR_irq);
mp_obj_t uart_irq_fn = mp_load_attr(MP_OBJ_FROM_PTR(&bt_hci_uart_obj), MP_QSTR_irq);
mp_obj_t uargs[] = {
MP_OBJ_FROM_PTR(&mp_uart_interrupt_obj),
MP_OBJ_NEW_SMALL_INT(UART_FLAG_IDLE),

2
ports/stm32/pyb_can.c
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@ -563,7 +563,7 @@ STATIC mp_obj_t pyb_can_initfilterbanks(mp_obj_t self, mp_obj_t bank_in) {
#endif
for (int f = 0; f < CAN_MAX_FILTER; f++) {
can_clearfilter(self, f, can2_start_bank);
can_clearfilter(MP_OBJ_TO_PTR(self), f, can2_start_bank);
}
return mp_const_none;
}

2
ports/stm32/pyb_i2c.c
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@ -599,7 +599,7 @@ STATIC mp_obj_t pyb_i2c_init_helper(const pyb_i2c_obj_t *self, size_t n_args, co
{ MP_QSTR_gencall, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
{ MP_QSTR_dma, MP_ARG_KW_ONLY | MP_ARG_BOOL, {.u_bool = false} },
#if PYB_I2C_TIMINGR
{ MP_QSTR_timingr, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_obj = mp_const_none} },
{ MP_QSTR_timingr, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_NONE} },
#endif
};

2
ports/stm32/storage.c
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@ -365,7 +365,7 @@ STATIC mp_obj_t pyb_flash_writeblocks(size_t n_args, const mp_obj_t *args) {
STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_flash_writeblocks_obj, 3, 4, pyb_flash_writeblocks);
STATIC mp_obj_t pyb_flash_ioctl(mp_obj_t self_in, mp_obj_t cmd_in, mp_obj_t arg_in) {
pyb_flash_obj_t *self = self_in;
pyb_flash_obj_t *self = MP_OBJ_TO_PTR(self_in);
mp_int_t cmd = mp_obj_get_int(cmd_in);
switch (cmd) {
case MP_BLOCKDEV_IOCTL_INIT: {