rp2/machine_uart: Fix UART RTS behaviour so RTS is deasserted.

The UART hardware flow control was not working correctly, the receive FIFO
was always fetched and RTS was never deasserted.  This is not a problem
when hardware flow control is not used: normally, if the receive FIFO is
full, the UART receiver won't receive data into the FIFO anymore, but the
current implementation fetches from the FIFO and discards it instead.
The problem is that data is discarded even when RTS is enabled.

This commit fixes the issue by only taking from the FIFO if there is room
in the ring buffer to put the character.

Signed-off-by: YoungJoon Chun <yjchun@mac.com>

ports/rp2/machine_uart.c

@@ -109,10 +109,10 @@ STATIC const char *_invert_name[] = {"None", "INV_TX", "INV_RX", "INV_TX|INV_RX"
 /******************************************************************************/
 // IRQ and buffer handling
 
-// take all bytes from the fifo and store them, if possible, in the buffer
+// take all bytes from the fifo and store them in the buffer
 STATIC void uart_drain_rx_fifo(machine_uart_obj_t *self) {
-    while (uart_is_readable(self->uart)) {
+    while (uart_is_readable(self->uart) && ringbuf_free(&self->read_buffer) > 0) {
-        // try to write the data, ignore the fail
+        // get a byte from uart and put into the buffer
         ringbuf_put(&(self->read_buffer), uart_get_hw(self->uart)->dr);
     }
 }