Merge pull request #7628 from RetiredWizard/broadcomspi
Port/Broadcom Switch to "unmeasured" core clock speed check
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commit
d5e936ce7b
8
.gitmodules
vendored
8
.gitmodules
vendored
@ -187,10 +187,6 @@
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[submodule "frozen/Adafruit_CircuitPython_APDS9960"]
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path = frozen/Adafruit_CircuitPython_APDS9960
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url = https://github.com/adafruit/Adafruit_CircuitPython_APDS9960
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[submodule "ports/broadcom/peripherals"]
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path = ports/broadcom/peripherals
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url = https://github.com/adafruit/broadcom-peripherals.git
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branch = main-build
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[submodule "rpi-firmware"]
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path = ports/broadcom/firmware
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url = https://github.com/raspberrypi/rpi-firmware.git
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@ -328,3 +324,7 @@
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[submodule "frozen/Adafruit_CircuitPython_SSD1680"]
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path = frozen/Adafruit_CircuitPython_SSD1680
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url = https://github.com/adafruit/Adafruit_CircuitPython_SSD1680
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[submodule "ports/broadcom/peripherals"]
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path = ports/broadcom/peripherals
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url = https://github.com/adafruit/broadcom-peripherals.git
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branch = main-build
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@ -98,7 +98,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
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self->sda_pin = sda;
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self->scl_pin = scl;
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uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
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uint32_t source_clock = vcmailbox_get_clock_rate(VCMAILBOX_CLOCK_CORE);
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uint16_t clock_divider = source_clock / frequency;
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self->peripheral->DIV_b.CDIV = clock_divider;
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@ -87,6 +87,8 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
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mp_raise_NotImplementedError(translate("Half duplex SPI is not implemented"));
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}
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// BCM_VERSION != 2711 have 3 SPI but as listed in peripherals/gen/pins.c two are on
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// index 0, once one index 0 SPI is found the other will throw an invalid_pins error.
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for (size_t i = 0; i < NUM_SPI; i++) {
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if (spi_in_use[i]) {
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continue;
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@ -157,6 +159,7 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
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common_hal_reset_pin(self->MOSI);
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common_hal_reset_pin(self->MISO);
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self->clock = NULL;
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spi_in_use[self->index] = false;
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if (self->index == 1 ||
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self->index == 2) {
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@ -180,7 +183,7 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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if (self->index == 1 || self->index == 2) {
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SPI1_Type *p = aux_spi[self->index];
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uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
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uint32_t source_clock = vcmailbox_get_clock_rate(VCMAILBOX_CLOCK_CORE);
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uint16_t clock_divider = source_clock / baudrate;
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if (source_clock % baudrate > 0) {
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clock_divider += 2;
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@ -198,7 +201,7 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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SPI0_Type *p = spi[self->index];
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p->CS = polarity << SPI0_CS_CPOL_Pos |
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phase << SPI0_CS_CPHA_Pos;
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uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
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uint32_t source_clock = vcmailbox_get_clock_rate(VCMAILBOX_CLOCK_CORE);
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uint16_t clock_divider = source_clock / baudrate;
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if (source_clock % baudrate > 0) {
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clock_divider += 2;
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@ -124,7 +124,7 @@ void pl011_IRQHandler(uint8_t index) {
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// Clear the interrupt in case we weren't able to clear it by emptying the
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// FIFO. (This won't clear the FIFO.)
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ARM_UART_PL011_Type *pl011 = uart[index];
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pl011->ICR = UART0_ICR_RXIC_Msk;
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pl011->ICR = ARM_UART_PL011_ICR_RXIC_Msk;
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}
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void UART0_IRQHandler(void) {
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@ -258,31 +258,31 @@ void common_hal_busio_uart_construct(busio_uart_obj_t *self,
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common_hal_busio_uart_set_baudrate(self, baudrate);
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uint32_t line_control = UART0_LCR_H_FEN_Msk;
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line_control |= (bits - 5) << UART0_LCR_H_WLEN_Pos;
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uint32_t line_control = ARM_UART_PL011_LCR_H_FEN_Msk;
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line_control |= (bits - 5) << ARM_UART_PL011_LCR_H_WLEN_Pos;
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if (stop == 2) {
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line_control |= UART0_LCR_H_STP2_Msk;
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line_control |= ARM_UART_PL011_LCR_H_STP2_Msk;
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}
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if (parity != BUSIO_UART_PARITY_NONE) {
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line_control |= UART0_LCR_H_PEN_Msk;
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line_control |= ARM_UART_PL011_LCR_H_PEN_Msk;
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}
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if (parity == BUSIO_UART_PARITY_EVEN) {
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line_control |= UART0_LCR_H_EPS_Msk;
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line_control |= ARM_UART_PL011_LCR_H_EPS_Msk;
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}
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pl011->LCR_H = line_control;
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uint32_t control = UART0_CR_UARTEN_Msk;
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uint32_t control = ARM_UART_PL011_CR_UARTEN_Msk;
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if (tx != NULL) {
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control |= UART0_CR_TXE_Msk;
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control |= ARM_UART_PL011_CR_TXE_Msk;
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}
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if (rx != NULL) {
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control |= UART0_CR_RXE_Msk;
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control |= ARM_UART_PL011_CR_RXE_Msk;
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}
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if (cts != NULL) {
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control |= UART0_CR_CTSEN_Msk;
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control |= ARM_UART_PL011_CR_CTSEN_Msk;
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}
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if (rts != NULL) {
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control |= UART0_CR_RTSEN_Msk;
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control |= ARM_UART_PL011_CR_RTSEN_Msk;
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}
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pl011->CR = control;
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}
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@ -460,7 +460,7 @@ uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) {
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void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) {
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if (self->uart_id == 1) {
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uint32_t source_clock = vcmailbox_get_clock_rate_measured(VCMAILBOX_CLOCK_CORE);
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uint32_t source_clock = vcmailbox_get_clock_rate(VCMAILBOX_CLOCK_CORE);
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UART1->BAUD = ((source_clock / (baudrate * 8)) - 1);
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} else {
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ARM_UART_PL011_Type *pl011 = uart[self->uart_id];
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@ -122,27 +122,27 @@ STATIC sdmmc_err_t _do_transaction(int slot, sdmmc_command_t *cmdinfo) {
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if (EMMC->STATUS_b.DAT_INHIBIT) {
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return SDMMC_ERR_BUSY;
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}
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cmd_flags = EMMC_CMDTM_TM_BLKCNT_EN_Msk | EMMC_CMDTM_CMD_ISDATA_Msk;
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cmd_flags = Arasan_EMMC_Distributor_CMDTM_TM_BLKCNT_EN_Msk | Arasan_EMMC_Distributor_CMDTM_CMD_ISDATA_Msk;
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if (cmdinfo->datalen > cmdinfo->blklen) {
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cmd_flags |= EMMC_CMDTM_TM_MULTI_BLOCK_Msk;
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cmd_flags |= Arasan_EMMC_Distributor_CMDTM_TM_MULTI_BLOCK_Msk;
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if ((cmdinfo->flags & SCF_AUTO_STOP) != 0) {
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cmd_flags |= 1 << EMMC_CMDTM_TM_AUTO_CMD_EN_Pos;
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cmd_flags |= 1 << Arasan_EMMC_Distributor_CMDTM_TM_AUTO_CMD_EN_Pos;
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}
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}
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if (read) {
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cmd_flags |= EMMC_CMDTM_TM_DAT_DIR_Msk;
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cmd_flags |= Arasan_EMMC_Distributor_CMDTM_TM_DAT_DIR_Msk;
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}
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EMMC->BLKSIZECNT = (cmdinfo->datalen / cmdinfo->blklen) << EMMC_BLKSIZECNT_BLKCNT_Pos |
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cmdinfo->blklen << EMMC_BLKSIZECNT_BLKSIZE_Pos;
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EMMC->BLKSIZECNT = (cmdinfo->datalen / cmdinfo->blklen) << Arasan_EMMC_Distributor_BLKSIZECNT_BLKCNT_Pos |
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cmdinfo->blklen << Arasan_EMMC_Distributor_BLKSIZECNT_BLKSIZE_Pos;
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}
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uint32_t response_type = EMMC_CMDTM_CMD_RSPNS_TYPE_RESPONSE_48BITS;
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uint32_t crc = 0;
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if ((cmdinfo->flags & SCF_RSP_CRC) != 0) {
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crc |= EMMC_CMDTM_CMD_CRCCHK_EN_Msk;
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crc |= Arasan_EMMC_Distributor_CMDTM_CMD_CRCCHK_EN_Msk;
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}
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if ((cmdinfo->flags & SCF_RSP_IDX) != 0) {
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crc |= EMMC_CMDTM_CMD_IXCHK_EN_Msk;
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crc |= Arasan_EMMC_Distributor_CMDTM_CMD_IXCHK_EN_Msk;
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}
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if ((cmdinfo->flags & SCF_RSP_136) != 0) {
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response_type = EMMC_CMDTM_CMD_RSPNS_TYPE_RESPONSE_136BITS;
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@ -152,8 +152,8 @@ STATIC sdmmc_err_t _do_transaction(int slot, sdmmc_command_t *cmdinfo) {
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response_type = EMMC_CMDTM_CMD_RSPNS_TYPE_RESPONSE_NONE;
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}
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uint32_t full_cmd = cmd_flags | crc |
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cmdinfo->opcode << EMMC_CMDTM_CMD_INDEX_Pos |
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response_type << EMMC_CMDTM_CMD_RSPNS_TYPE_Pos;
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cmdinfo->opcode << Arasan_EMMC_Distributor_CMDTM_CMD_INDEX_Pos |
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response_type << Arasan_EMMC_Distributor_CMDTM_CMD_RSPNS_TYPE_Pos;
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EMMC->CMDTM = full_cmd;
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// Wait for an interrupt to indicate completion of the command.
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@ -170,7 +170,7 @@ STATIC sdmmc_err_t _do_transaction(int slot, sdmmc_command_t *cmdinfo) {
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}
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return SDMMC_ERR_TIMEOUT;
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} else {
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EMMC->INTERRUPT = EMMC_INTERRUPT_CMD_DONE_Msk;
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EMMC->INTERRUPT = Arasan_EMMC_Distributor_INTERRUPT_CMD_DONE_Msk;
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}
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// Transfer the data.
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@ -197,7 +197,7 @@ STATIC sdmmc_err_t _do_transaction(int slot, sdmmc_command_t *cmdinfo) {
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EMMC->DATA = ((uint32_t *)cmdinfo->data)[i];
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}
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}
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uint32_t data_done_mask = EMMC_INTERRUPT_ERR_Msk | EMMC_INTERRUPT_DATA_DONE_Msk;
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uint32_t data_done_mask = Arasan_EMMC_Distributor_INTERRUPT_ERR_Msk | Arasan_EMMC_Distributor_INTERRUPT_DATA_DONE_Msk;
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start_ticks = port_get_raw_ticks(NULL);
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while ((EMMC->INTERRUPT & data_done_mask) == 0 && (port_get_raw_ticks(NULL) - start_ticks) < (size_t)cmdinfo->timeout_ms) {
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}
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@ -282,7 +282,7 @@ void common_hal_sdioio_sdcard_construct(sdioio_sdcard_obj_t *self,
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}
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// Set max timeout
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EMMC->CONTROL1 |= EMMC_CONTROL1_CLK_INTLEN_Msk | (0xe << EMMC_CONTROL1_DATA_TOUNIT_Pos);
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EMMC->CONTROL1 |= Arasan_EMMC_Distributor_CONTROL1_CLK_INTLEN_Msk | (0xe << Arasan_EMMC_Distributor_CONTROL1_DATA_TOUNIT_Pos);
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EMMC->IRPT_MASK = 0xffffffff;
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@ -1 +1 @@
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Subproject commit 08370086080759ed54ac1136d62d2ad24c6fa267
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Subproject commit d3a6b50a21e7dd49ba4bfa0374da3407594caa50
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