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stm32/storage: Remove all SPI-flash bdev cfg, to be provided per board.

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If a board wants to use SPI flash for storage then it must now provide the
configuration itself, using the MICROPY_HW_BDEV_xxx macros.
This commit is contained in:
Damien George 2018-03-10 00:36:22 +11:00
parent 1803e8ef22
commit d1c4bd69df
3 changed files with 21 additions and 88 deletions
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53
ports/stm32/spibdev.c
View File

@ -30,54 +30,6 @@
#include "led.h"
#include "storage.h"
#if defined(MICROPY_HW_SPIFLASH_SIZE_BITS)
#include "drivers/memory/spiflash.h"
#include "genhdr/pins.h"
#if defined(MICROPY_HW_SPIFLASH_MOSI)
// External SPI flash uses standard SPI interface
STATIC const mp_soft_spi_obj_t soft_spi_bus = {
.delay_half = MICROPY_HW_SOFTSPI_MIN_DELAY,
.polarity = 0,
.phase = 0,
.sck = &MICROPY_HW_SPIFLASH_SCK,
.mosi = &MICROPY_HW_SPIFLASH_MOSI,
.miso = &MICROPY_HW_SPIFLASH_MISO,
};
const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_SPI,
.bus.u_spi.cs = &MICROPY_HW_SPIFLASH_CS,
.bus.u_spi.data = (void*)&soft_spi_bus,
.bus.u_spi.proto = &mp_soft_spi_proto,
};
#elif defined(MICROPY_HW_SPIFLASH_IO0)
// External SPI flash uses quad SPI interface
#include "drivers/bus/qspi.h"
STATIC const mp_soft_qspi_obj_t soft_qspi_bus = {
.cs = &MICROPY_HW_SPIFLASH_CS,
.clk = &MICROPY_HW_SPIFLASH_SCK,
.io0 = &MICROPY_HW_SPIFLASH_IO0,
.io1 = &MICROPY_HW_SPIFLASH_IO1,
.io2 = &MICROPY_HW_SPIFLASH_IO2,
.io3 = &MICROPY_HW_SPIFLASH_IO3,
};
const mp_spiflash_config_t spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_QSPI,
.bus.u_qspi.data = (void*)&soft_qspi_bus,
.bus.u_qspi.proto = &mp_soft_qspi_proto,
};
#endif
int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
switch (op) {
case BDEV_IOCTL_INIT:
@ -86,9 +38,6 @@ int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg) {
bdev->flash_tick_counter_last_write = 0;
return 0;
case BDEV_IOCTL_NUM_BLOCKS:
return MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE;
case BDEV_IOCTL_IRQ_HANDLER:
if ((bdev->spiflash.flags & 1) && sys_tick_has_passed(bdev->flash_tick_counter_last_write, 1000)) {
mp_spiflash_flush(&bdev->spiflash);
@ -130,5 +79,3 @@ int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_nu
return ret;
}
#endif // defined(MICROPY_HW_SPIFLASH_SIZE_BITS)

54
ports/stm32/storage.c
View File

@ -34,24 +34,12 @@
#include "storage.h"
#include "irq.h"
#if defined(MICROPY_HW_SPIFLASH_SIZE_BITS)
// Use external SPI flash as the storage medium
STATIC spi_bdev_t spi_bdev;
#define BDEV_IOCTL(op, arg) ( \
(op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
)
#define BDEV_READBLOCKS(dest, bl, n) spi_bdev_readblocks(&spi_bdev, (dest), (bl), (n))
#define BDEV_WRITEBLOCKS(src, bl, n) spi_bdev_writeblocks(&spi_bdev, (src), (bl), (n))
#else
#if !defined(MICROPY_HW_SPIFLASH_SIZE_BITS)
// Use internal flash as the storage medium
#define BDEV_IOCTL flash_bdev_ioctl
#define BDEV_READBLOCK flash_bdev_readblock
#define BDEV_WRITEBLOCK flash_bdev_writeblock
#define MICROPY_HW_BDEV_IOCTL flash_bdev_ioctl
#define MICROPY_HW_BDEV_READBLOCK flash_bdev_readblock
#define MICROPY_HW_BDEV_WRITEBLOCK flash_bdev_writeblock
#endif
@ -63,7 +51,7 @@ void storage_init(void) {
if (!storage_is_initialised) {
storage_is_initialised = true;
BDEV_IOCTL(BDEV_IOCTL_INIT, 0);
MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_INIT, 0);
// Enable the flash IRQ, which is used to also call our storage IRQ handler
// It needs to go at a higher priority than all those components that rely on
@ -78,15 +66,15 @@ uint32_t storage_get_block_size(void) {
}
uint32_t storage_get_block_count(void) {
return FLASH_PART1_START_BLOCK + BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0);
return FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0);
}
void storage_irq_handler(void) {
BDEV_IOCTL(BDEV_IOCTL_IRQ_HANDLER, 0);
MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_IRQ_HANDLER, 0);
}
void storage_flush(void) {
BDEV_IOCTL(BDEV_IOCTL_SYNC, 0);
MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_SYNC, 0);
}
static void build_partition(uint8_t *buf, int boot, int type, uint32_t start_block, uint32_t num_blocks) {
@ -134,7 +122,7 @@ bool storage_read_block(uint8_t *dest, uint32_t block) {
dest[i] = 0;
}
build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0));
build_partition(dest + 446, 0, 0x01 /* FAT12 */, FLASH_PART1_START_BLOCK, MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0));
build_partition(dest + 462, 0, 0, 0, 0);
build_partition(dest + 478, 0, 0, 0, 0);
build_partition(dest + 494, 0, 0, 0, 0);
@ -144,9 +132,9 @@ bool storage_read_block(uint8_t *dest, uint32_t block) {
return true;
#if defined(BDEV_READBLOCK)
} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return BDEV_READBLOCK(dest, block - FLASH_PART1_START_BLOCK);
#if defined(MICROPY_HW_BDEV_READBLOCK)
} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return MICROPY_HW_BDEV_READBLOCK(dest, block - FLASH_PART1_START_BLOCK);
#endif
} else {
return false;
@ -158,9 +146,9 @@ bool storage_write_block(const uint8_t *src, uint32_t block) {
if (block == 0) {
// can't write MBR, but pretend we did
return true;
#if defined(BDEV_WRITEBLOCK)
} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return BDEV_WRITEBLOCK(src, block - FLASH_PART1_START_BLOCK);
#if defined(MICROPY_HW_BDEV_WRITEBLOCK)
} else if (FLASH_PART1_START_BLOCK <= block && block < FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return MICROPY_HW_BDEV_WRITEBLOCK(src, block - FLASH_PART1_START_BLOCK);
#endif
} else {
return false;
@ -168,9 +156,9 @@ bool storage_write_block(const uint8_t *src, uint32_t block) {
}
mp_uint_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_blocks) {
#if defined(BDEV_READBLOCKS)
if (FLASH_PART1_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART1_START_BLOCK + BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return BDEV_READBLOCKS(dest, block_num - FLASH_PART1_START_BLOCK, num_blocks);
#if defined(MICROPY_HW_BDEV_READBLOCKS)
if (FLASH_PART1_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return MICROPY_HW_BDEV_READBLOCKS(dest, block_num - FLASH_PART1_START_BLOCK, num_blocks);
}
#endif
@ -183,9 +171,9 @@ mp_uint_t storage_read_blocks(uint8_t *dest, uint32_t block_num, uint32_t num_bl
}
mp_uint_t storage_write_blocks(const uint8_t *src, uint32_t block_num, uint32_t num_blocks) {
#if defined(BDEV_WRITEBLOCKS)
if (FLASH_PART1_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART1_START_BLOCK + BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return BDEV_WRITEBLOCKS(src, block_num - FLASH_PART1_START_BLOCK, num_blocks);
#if defined(MICROPY_HW_BDEV_WRITEBLOCKS)
if (FLASH_PART1_START_BLOCK <= block_num && block_num + num_blocks <= FLASH_PART1_START_BLOCK + MICROPY_HW_BDEV_IOCTL(BDEV_IOCTL_NUM_BLOCKS, 0)) {
return MICROPY_HW_BDEV_WRITEBLOCKS(src, block_num - FLASH_PART1_START_BLOCK, num_blocks);
}
#endif

2
ports/stm32/storage.h
View File

@ -62,8 +62,6 @@ typedef struct _spi_bdev_t {
uint32_t flash_tick_counter_last_write;
} spi_bdev_t;
extern const mp_spiflash_config_t spiflash_config;
int32_t spi_bdev_ioctl(spi_bdev_t *bdev, uint32_t op, uint32_t arg);
int spi_bdev_readblocks(spi_bdev_t *bdev, uint8_t *dest, uint32_t block_num, uint32_t num_blocks);
int spi_bdev_writeblocks(spi_bdev_t *bdev, const uint8_t *src, uint32_t block_num, uint32_t num_blocks);