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stmhal: Change PLL configuration for STM32F7DISC.

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Changes USB clock from 50MHz to 48MHz which improves USB communication.
This commit is contained in:
Fabian 2015-12-18 08:28:36 +01:00 committed by Damien George
parent da199e4407
commit d0f31ccf33
1 changed files with 3 additions and 3 deletions
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6
stmhal/boards/STM32F7DISC/mpconfigboard.h
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@ -18,11 +18,11 @@
#define MICROPY_BOARD_EARLY_INIT STM32F7DISC_board_early_init #define MICROPY_BOARD_EARLY_INIT STM32F7DISC_board_early_init
void STM32F7DISC_board_early_init(void); void STM32F7DISC_board_early_init(void);
// HSE is 8MHz // HSE is 25MHz
#define MICROPY_HW_CLK_PLLM (25) #define MICROPY_HW_CLK_PLLM (25)
#define MICROPY_HW_CLK_PLLN (400) #define MICROPY_HW_CLK_PLLN (336)
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
#define MICROPY_HW_CLK_PLLQ (8) #define MICROPY_HW_CLK_PLLQ (7)
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6 #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6