From d0d350da16f26dbac104218b4e02ebb9f9cb1205 Mon Sep 17 00:00:00 2001 From: Glenn Ruben Bakke Date: Tue, 18 Apr 2017 20:56:19 +0200 Subject: [PATCH] nrf5/hal/pwm: Updating PWM implementation to support manually set duty cycle period. Pulse width has precidence over duty cycle percentage. Also adding support for the two configurable modes, high to low, and low to high, duty cycles. --- nrf5/hal/hal_pwm.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/nrf5/hal/hal_pwm.c b/nrf5/hal/hal_pwm.c index d1c947f796..a0e69f469f 100644 --- a/nrf5/hal/hal_pwm.c +++ b/nrf5/hal/hal_pwm.c @@ -50,10 +50,20 @@ static const uint32_t hal_pwm_frequency_lookup[] = { void hal_pwm_init(NRF_PWM_Type * p_instance, hal_pwm_init_t const * p_pwm_init) { g_pwm_period = p_pwm_init->period; - uint16_t duty_cycle = ((g_pwm_period * p_pwm_init->duty)/100); + uint16_t pulse_width = ((g_pwm_period * p_pwm_init->duty)/100); + + if (p_pwm_init->pulse_width > 0) { + pulse_width = p_pwm_init->pulse_width; + } + + if (p_pwm_init->mode == HAL_PWM_MODE_HIGH_LOW) { + g_pwm_seq[0] = g_pwm_period - pulse_width; + g_pwm_seq[1] = g_pwm_period - pulse_width; + } else { + g_pwm_seq[0] = pulse_width; + g_pwm_seq[1] = pulse_width; + } - g_pwm_seq[0] = duty_cycle; - g_pwm_seq[1] = duty_cycle; g_pwm_seq[2] = 0; g_pwm_seq[3] = 0;