Merge pull request #1638 from dhalbert/disable-SPIM3
nrf: Disable SPIM3; add SPIM1; remove TWIM1
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cfb54f0263
@ -10,9 +10,10 @@
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#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#endif
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// NOTE: THIS WORKAROUND CAUSES BLE CODE TO CRASH; tested on 2019-03-11.
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// Turn on nrfx supported workarounds for errata in Rev1 of nRF52840
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#ifdef NRF52840_XXAA
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#define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
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// #define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
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#endif
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// SPI
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@ -25,13 +26,17 @@
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// We could write an interrupt handler that checks whether it's
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// being used for SPI or I2C, but perhaps two I2C's and 1-2 SPI's are good enough for now.
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// Enable SPIM2 and SPIM3 (if available)
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// Enable SPIM1, SPIM2 and SPIM3 (if available)
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// No conflict with TWIM0.
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#define NRFX_SPIM1_ENABLED 1
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#define NRFX_SPIM2_ENABLED 1
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#ifdef NRF_SPIM3
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#define NRFX_SPIM3_ENABLED 1
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#else
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#define NRFX_SPIM3_ENABLED 0
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#endif
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// DON'T ENABLE SPIM3 DUE TO ANOMALY WORKAROUND FAILURE (SEE ABOVE).
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// #ifdef NRF52840_XXAA
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// #define NRFX_SPIM_EXTENDED_ENABLED 1
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// #define NRFX_SPIM3_ENABLED 1
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// #else
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// #define NRFX_SPIM3_ENABLED 0
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// #endif
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#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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@ -40,10 +45,10 @@
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// QSPI
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#define NRFX_QSPI_ENABLED 1
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// TWI aka. I2C; enable TWIM0 and TWIM1 (no conflict with SPIM choices)
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// TWI aka. I2C; enable a single bus: TWIM0 (no conflict with SPIM1 and SPIM2)
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#define NRFX_TWIM_ENABLED 1
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#define NRFX_TWIM0_ENABLED 1
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#define NRFX_TWIM1_ENABLED 1
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//#define NRFX_TWIM1_ENABLED 1
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#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY NRF_TWIM_FREQ_400K
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