From cd5c0e99f797a5d21156c1f6d421b8c8e7fbf090 Mon Sep 17 00:00:00 2001 From: jun2sak Date: Sun, 7 Mar 2021 19:09:01 +0900 Subject: [PATCH] Clean up. --- ports/nrf/supervisor/debug_uart.c | 26 ++++++++++++++++---------- ports/nrf/supervisor/port.c | 6 ------ 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/ports/nrf/supervisor/debug_uart.c b/ports/nrf/supervisor/debug_uart.c index f920cdae32..f770b661fc 100644 --- a/ports/nrf/supervisor/debug_uart.c +++ b/ports/nrf/supervisor/debug_uart.c @@ -65,16 +65,6 @@ void _debug_uart_init(void) { NRF_GPIO_PIN_H0H1, // orig=S0S1 NRF_GPIO_PIN_NOSENSE); _dbg_uart_initialized = 1; -#if 1 //XXX - #define DBGPIN 6+32 - nrf_gpio_cfg(DBGPIN, - NRF_GPIO_PIN_DIR_OUTPUT, - NRF_GPIO_PIN_INPUT_DISCONNECT, - NRF_GPIO_PIN_NOPULL, - NRF_GPIO_PIN_H0H1, - NRF_GPIO_PIN_NOSENSE); - nrf_gpio_pin_write(DBGPIN, 1); -#endif return; } @@ -191,6 +181,22 @@ void dbg_dump_GPIOregs(void) { (int)(reg->EVENTS_PORT), (int)(reg->INTENSET)); } +void dbg_dumpQSPIreg(void) { + uint32_t r; + dbg_printf("QSPI\r\n"); + r = NRF_QSPI->IFCONFIG0; + dbg_printf("IFCONFIG0 READ=%ld write=%ld ADDR=%ld DPM=%ld PPSIZE=%ld\r\n", + r & 7, (r >> 3) & 7, (r >> 6) & 1, (r >> 7) & 1, (r >> 12) & 1); + r = NRF_QSPI->IFCONFIG1; + dbg_printf("IFCONFIG1 SCKDELAY=%ld SPIMODE=%ld SCKFREQ=%ld\r\n", + r & 0xFF, (r >> 25) & 1, (r >> 28) & 0xF); + r = NRF_QSPI->STATUS; + dbg_printf("STATUS DPM=%ld READY=%ld SREG=0x%02lX\r\n", + (r >> 2) & 1, (r >> 3) & 1, (r >> 24) & 0xFF); + r = NRF_QSPI->DPMDUR; + dbg_printf("DPMDUR ENTER=%ld EXIT=%ld\r\n", r & 0xFFFF, (r >> 16) & 0xFFFF); +} + void dbg_dump_reset_reason(void) { int reset_reason = (int)common_hal_mcu_processor_get_reset_reason(); const char* rr_str[] = { diff --git a/ports/nrf/supervisor/port.c b/ports/nrf/supervisor/port.c index d5efa92b46..1ae3cb29ab 100644 --- a/ports/nrf/supervisor/port.c +++ b/ports/nrf/supervisor/port.c @@ -76,7 +76,6 @@ static void power_warning_handler(void) { #ifdef NRF_DEBUG_PRINT extern void _debug_uart_init(void); -#define DBGPIN 6+32 //XXX P1_06 = TP1 #endif uint32_t reset_reason_saved = 0; @@ -98,11 +97,6 @@ static volatile struct { } overflow_tracker __attribute__((section(".uninitialized"))); void rtc_handler(nrfx_rtc_int_type_t int_type) { -#ifdef NRF_DEBUG_PRINT - if (int_type == NRFX_RTC_INT_TICK) { - nrf_gpio_pin_toggle(DBGPIN); //XXX - } -#endif if (int_type == NRFX_RTC_INT_OVERFLOW) { // Our RTC is 24 bits and we're clocking it at 32.768khz which is 32 (2 ** 5) subticks per // tick.