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atmel/samd: Add basic PWM support which only allows for changing the duty.

This commit is contained in:
Scott Shawcroft 2016-08-30 13:10:52 -07:00
parent b883a15d82
commit ccb309bd5c
21 changed files with 14036 additions and 40 deletions
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4
atmel-samd/Makefile
View File

@ -58,6 +58,7 @@ INC += $(addprefix -Iasf/sam0/,\
drivers/system/power/power_sam_d_r \
drivers/system/reset/reset_sam_d_r \
drivers/sercom/ \
drivers/tc/ \
drivers/usb/ \
utils \
utils/cmsis/samd21/include \
@ -107,6 +108,8 @@ SRC_ASF = $(addprefix asf/sam0/,\
drivers/system/interrupt/system_interrupt.c \
drivers/system/pinmux/pinmux.c \
drivers/system/system.c \
drivers/tc/tc_sam_d_r/tc.c \
drivers/tcc/tcc.c \
drivers/usb/stack_interface/usb_device_udd.c \
drivers/usb/stack_interface/usb_dual.c \
drivers/usb/usb_sam_d_r/usb.c \
@ -118,6 +121,7 @@ SRC_C = \
modmachine_adc.c \
modmachine_dac.c \
modmachine_pin.c \
modmachine_pwm.c \
modutime.c \
mphalport.c \
pin_named_pins.c \

434
atmel-samd/asf/sam0/drivers/tc/docimg/overview.svg Normal file
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@ -0,0 +1,434 @@
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atmel-samd/asf/sam0/drivers/tc/tc.h Normal file
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/**
* \file
*
* \brief SAM TC - Timer Counter Callback Driver
*
* Copyright (C) 2013-2016 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#include "tc_interrupt.h"
void *_tc_instances[TC_INST_NUM];
void _tc_interrupt_handler(uint8_t instance);
/**
* \brief Registers a callback.
*
* Registers a callback function which is implemented by the user.
*
* \note The callback must be enabled by \ref tc_enable_callback,
* in order for the interrupt handler to call it when the conditions for the
* callback type is met.
*
* \param[in] module Pointer to TC software instance struct
* \param[in] callback_func Pointer to callback function
* \param[in] callback_type Callback type given by an enum
*/
enum status_code tc_register_callback(
struct tc_module *const module,
tc_callback_t callback_func,
const enum tc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
Assert(callback_func);
/* Register callback function */
module->callback[callback_type] = callback_func;
/* Set the bit corresponding to the callback_type */
if (callback_type == TC_CALLBACK_CC_CHANNEL0) {
module->register_callback_mask |= TC_INTFLAG_MC(1);
}
else if (callback_type == TC_CALLBACK_CC_CHANNEL1) {
module->register_callback_mask |= TC_INTFLAG_MC(2);
}
else {
module->register_callback_mask |= (1 << callback_type);
}
return STATUS_OK;
}
/**
* \brief Unregisters a callback.
*
* Unregisters a callback function implemented by the user. The callback should be
* disabled before it is unregistered.
*
* \param[in] module Pointer to TC software instance struct
* \param[in] callback_type Callback type given by an enum
*/
enum status_code tc_unregister_callback(
struct tc_module *const module,
const enum tc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
/* Unregister callback function */
module->callback[callback_type] = NULL;
/* Clear the bit corresponding to the callback_type */
if (callback_type == TC_CALLBACK_CC_CHANNEL0) {
module->register_callback_mask &= ~TC_INTFLAG_MC(1);
}
else if (callback_type == TC_CALLBACK_CC_CHANNEL1) {
module->register_callback_mask &= ~TC_INTFLAG_MC(2);
}
else {
module->register_callback_mask &= ~(1 << callback_type);
}
return STATUS_OK;
}
/**
* \internal ISR handler for TC
*
* Auto-generate a set of interrupt handlers for each TC in the device.
*/
#define _TC_INTERRUPT_HANDLER(n, m) \
void TC##n##_Handler(void) \
{ \
_tc_interrupt_handler(m); \
}
#if (SAML21E) || (SAML21G) || (SAMR30E) || (SAMR30G)
_TC_INTERRUPT_HANDLER(0,0)
_TC_INTERRUPT_HANDLER(1,1)
_TC_INTERRUPT_HANDLER(4,2)
#else
MRECURSION(TC_INST_NUM, _TC_INTERRUPT_HANDLER, TC_INST_MAX_ID)
#endif
/**
* \internal Interrupt Handler for TC module
*
* Handles interrupts as they occur, it will run the callback functions
* that are registered and enabled.
*
* \param[in] instance ID of the TC instance calling the interrupt
* handler
*/
void _tc_interrupt_handler(
uint8_t instance)
{
/* Temporary variable */
uint8_t interrupt_and_callback_status_mask;
/* Get device instance from the look-up table */
struct tc_module *module
= (struct tc_module *)_tc_instances[instance];
/* Read and mask interrupt flag register */
interrupt_and_callback_status_mask = module->hw->COUNT8.INTFLAG.reg &
module->register_callback_mask &
module->enable_callback_mask;
/* Check if an Overflow interrupt has occurred */
if (interrupt_and_callback_status_mask & TC_INTFLAG_OVF) {
/* Invoke registered and enabled callback function */
(module->callback[TC_CALLBACK_OVERFLOW])(module);
/* Clear interrupt flag */
module->hw->COUNT8.INTFLAG.reg = TC_INTFLAG_OVF;
}
/* Check if an Error interrupt has occurred */
if (interrupt_and_callback_status_mask & TC_INTFLAG_ERR) {
/* Invoke registered and enabled callback function */
(module->callback[TC_CALLBACK_ERROR])(module);
/* Clear interrupt flag */
module->hw->COUNT8.INTFLAG.reg = TC_INTFLAG_ERR;
}
/* Check if an Match/Capture Channel 0 interrupt has occurred */
if (interrupt_and_callback_status_mask & TC_INTFLAG_MC(1)) {
/* Invoke registered and enabled callback function */
(module->callback[TC_CALLBACK_CC_CHANNEL0])(module);
/* Clear interrupt flag */
module->hw->COUNT8.INTFLAG.reg = TC_INTFLAG_MC(1);
}
/* Check if an Match/Capture Channel 1 interrupt has occurred */
if (interrupt_and_callback_status_mask & TC_INTFLAG_MC(2)) {
/* Invoke registered and enabled callback function */
(module->callback[TC_CALLBACK_CC_CHANNEL1])(module);
/* Clear interrupt flag */
module->hw->COUNT8.INTFLAG.reg = TC_INTFLAG_MC(2);
}
}

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/**
* \file
*
* \brief SAM TC - Timer Counter Callback Driver
*
* Copyright (C) 2013-2016 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#ifndef TC_INTERRUPT_H_INCLUDED
#define TC_INTERRUPT_H_INCLUDED
#include "tc.h"
#include <system_interrupt.h>
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(__DOXYGEN__)
extern void *_tc_instances[TC_INST_NUM];
# define _TC_INTERRUPT_VECT_NUM(n, unused) \
SYSTEM_INTERRUPT_MODULE_TC##n,
/**
* \internal Get the interrupt vector for the given device instance
*
* \param[in] TC module instance number
*
* \return Interrupt vector for of the given TC module instance.
*/
static enum system_interrupt_vector _tc_interrupt_get_interrupt_vector(
uint32_t inst_num)
{
static uint8_t tc_interrupt_vectors[TC_INST_NUM] =
{
#if (SAML21E) || (SAML21G) || (SAMR30E) || (SAMR30G)
SYSTEM_INTERRUPT_MODULE_TC0,
SYSTEM_INTERRUPT_MODULE_TC1,
SYSTEM_INTERRUPT_MODULE_TC4
#else
MRECURSION(TC_INST_NUM, _TC_INTERRUPT_VECT_NUM, TC_INST_MAX_ID)
#endif
};
return (enum system_interrupt_vector)tc_interrupt_vectors[inst_num];
}
#endif /* !defined(__DOXYGEN__) */
/**
* \name Callback Management
* {@
*/
enum status_code tc_register_callback(
struct tc_module *const module,
tc_callback_t callback_func,
const enum tc_callback callback_type);
enum status_code tc_unregister_callback(
struct tc_module *const module,
const enum tc_callback callback_type);
/**
* \brief Enables callback.
*
* Enables the callback function registered by the \ref
* tc_register_callback. The callback function will be called from the
* interrupt handler when the conditions for the callback type are
* met. This function will also enable the appropriate interrupts.
*
* \param[in] module Pointer to TC software instance struct
* \param[in] callback_type Callback type given by an enum
*/
static inline void tc_enable_callback(
struct tc_module *const module,
const enum tc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
/* Enable interrupts for this TC module */
system_interrupt_enable(_tc_interrupt_get_interrupt_vector(_tc_get_inst_index(module->hw)));
/* Enable callback */
if (callback_type == TC_CALLBACK_CC_CHANNEL0) {
module->enable_callback_mask |= TC_INTFLAG_MC(1);
module->hw->COUNT8.INTENSET.reg = TC_INTFLAG_MC(1);
}
else if (callback_type == TC_CALLBACK_CC_CHANNEL1) {
module->enable_callback_mask |= TC_INTFLAG_MC(2);
module->hw->COUNT8.INTENSET.reg = TC_INTFLAG_MC(2);
}
else {
module->enable_callback_mask |= (1 << callback_type);
module->hw->COUNT8.INTENSET.reg = (1 << callback_type);
}
}
/**
* \brief Disables callback.
*
* Disables the callback function registered by the \ref
* tc_register_callback, and the callback will not be called from the
* interrupt routine. The function will also disable the appropriate
* interrupts.
*
* \param[in] module Pointer to TC software instance struct
* \param[in] callback_type Callback type given by an enum
*/
static inline void tc_disable_callback(
struct tc_module *const module,
const enum tc_callback callback_type){
/* Sanity check arguments */
Assert(module);
/* Disable callback */
if (callback_type == TC_CALLBACK_CC_CHANNEL0) {
module->hw->COUNT8.INTENCLR.reg = TC_INTFLAG_MC(1);
module->enable_callback_mask &= ~TC_INTFLAG_MC(1);
}
else if (callback_type == TC_CALLBACK_CC_CHANNEL1) {
module->hw->COUNT8.INTENCLR.reg = TC_INTFLAG_MC(2);
module->enable_callback_mask &= ~TC_INTFLAG_MC(2);
}
else {
module->hw->COUNT8.INTENCLR.reg = (1 << callback_type);
module->enable_callback_mask &= ~(1 << callback_type);
}
}
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* TC_INTERRUPT_H_INCLUDED */

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atmel-samd/asf/sam0/drivers/tc/tc_sam_d_r/tc.c Normal file
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/**
* \file
*
* \brief SAM TC - Timer Counter Driver
*
* Copyright (C) 2013-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#include "tc.h"
#if TC_ASYNC == true
# include "tc_interrupt.h"
# include <system_interrupt.h>
/** \internal
* Converts a given TC index to its interrupt vector index.
*/
# define _TC_INTERRUPT_VECT_NUM(n, unused) \
SYSTEM_INTERRUPT_MODULE_TC##n,
#endif
#if !defined(__DOXYGEN__)
# define _TC_GCLK_ID(n,unused) TPASTE3(TC,n,_GCLK_ID) ,
# define _TC_PM_APBCMASK(n,unused) TPASTE2(PM_APBCMASK_TC,n) ,
# define TC_INST_GCLK_ID { MRECURSION(TC_INST_NUM, _TC_GCLK_ID, TC_INST_MAX_ID) }
# define TC_INST_PM_APBCMASK { MRECURSION(TC_INST_NUM, _TC_PM_APBCMASK, TC_INST_MAX_ID) }
#endif
/**
* \internal Find the index of given TC module instance.
*
* \param[in] TC module instance pointer
*
* \return Index of the given TC module instance.
*/
uint8_t _tc_get_inst_index(
Tc *const hw)
{
/* List of available TC modules. */
Tc *const tc_modules[TC_INST_NUM] = TC_INSTS;
/* Find index for TC instance. */
for (uint32_t i = 0; i < TC_INST_NUM; i++) {
if (hw == tc_modules[i]) {
return i;
}
}
/* Invalid data given. */
Assert(false);
return 0;
}
/**
* \brief Initializes a hardware TC module instance.
*
* Enables the clock and initializes the TC module, based on the given
* configuration values.
*
* \param[in,out] module_inst Pointer to the software module instance struct
* \param[in] hw Pointer to the TC hardware module
* \param[in] config Pointer to the TC configuration options struct
*
* \return Status of the initialization procedure.
*
* \retval STATUS_OK The module was initialized successfully
* \retval STATUS_BUSY Hardware module was busy when the
* initialization procedure was attempted
* \retval STATUS_INVALID_ARG An invalid configuration option or argument
* was supplied
* \retval STATUS_ERR_DENIED Hardware module was already enabled, or the
* hardware module is configured in 32-bit
* slave mode
*/
enum status_code tc_init(
struct tc_module *const module_inst,
Tc *const hw,
const struct tc_config *const config)
{
/* Sanity check arguments */
Assert(hw);
Assert(module_inst);
Assert(config);
/* Temporary variable to hold all updates to the CTRLA
* register before they are written to it */
uint16_t ctrla_tmp = 0;
/* Temporary variable to hold all updates to the CTRLBSET
* register before they are written to it */
uint8_t ctrlbset_tmp = 0;
/* Temporary variable to hold all updates to the CTRLC
* register before they are written to it */
uint8_t ctrlc_tmp = 0;
/* Temporary variable to hold TC instance number */
uint8_t instance = _tc_get_inst_index(hw);
/* Array of GLCK ID for different TC instances */
uint8_t inst_gclk_id[] = TC_INST_GCLK_ID;
/* Array of PM APBC mask bit position for different TC instances */
uint16_t inst_pm_apbmask[] = TC_INST_PM_APBCMASK;
struct system_pinmux_config pin_config;
struct system_gclk_chan_config gclk_chan_config;
#if TC_ASYNC == true
/* Initialize parameters */
for (uint8_t i = 0; i < TC_CALLBACK_N; i++) {
module_inst->callback[i] = NULL;
}
module_inst->register_callback_mask = 0x00;
module_inst->enable_callback_mask = 0x00;
/* Register this instance for callbacks*/
_tc_instances[instance] = module_inst;
#endif
/* Associate the given device instance with the hardware module */
module_inst->hw = hw;
#if SAMD09 || SAMD10 || SAMD11
/* Check if even numbered TC modules are being configured in 32-bit
* counter size. Only odd numbered counters are allowed to be
* configured in 32-bit counter size.
*/
if ((config->counter_size == TC_COUNTER_SIZE_32BIT) &&
!((instance + TC_INSTANCE_OFFSET) & 0x01)) {
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
#else
/* Check if odd numbered TC modules are being configured in 32-bit
* counter size. Only even numbered counters are allowed to be
* configured in 32-bit counter size.
*/
if ((config->counter_size == TC_COUNTER_SIZE_32BIT) &&
((instance + TC_INSTANCE_OFFSET) & 0x01)) {
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
#endif
/* Make the counter size variable in the module_inst struct reflect
* the counter size in the module
*/
module_inst->counter_size = config->counter_size;
if (hw->COUNT8.CTRLA.reg & TC_CTRLA_SWRST) {
/* We are in the middle of a reset. Abort. */
return STATUS_BUSY;
}
if (hw->COUNT8.STATUS.reg & TC_STATUS_SLAVE) {
/* Module is used as a slave */
return STATUS_ERR_DENIED;
}
if (hw->COUNT8.CTRLA.reg & TC_CTRLA_ENABLE) {
/* Module must be disabled before initialization. Abort. */
return STATUS_ERR_DENIED;
}
/* Set up the TC PWM out pin for channel 0 */
if (config->pwm_channel[0].enabled) {
system_pinmux_get_config_defaults(&pin_config);
pin_config.mux_position = config->pwm_channel[0].pin_mux;
pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
system_pinmux_pin_set_config(
config->pwm_channel[0].pin_out, &pin_config);
}
/* Set up the TC PWM out pin for channel 1 */
if (config->pwm_channel[1].enabled) {
system_pinmux_get_config_defaults(&pin_config);
pin_config.mux_position = config->pwm_channel[1].pin_mux;
pin_config.direction = SYSTEM_PINMUX_PIN_DIR_OUTPUT;
system_pinmux_pin_set_config(
config->pwm_channel[1].pin_out, &pin_config);
}
/* Enable the user interface clock in the PM */
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC,
inst_pm_apbmask[instance]);
/* Enable the slave counter if counter_size is 32-bit */
if ((config->counter_size == TC_COUNTER_SIZE_32BIT))
{
/* Enable the user interface clock in the PM */
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC,
inst_pm_apbmask[instance + 1]);
}
/* Setup clock for module */
system_gclk_chan_get_config_defaults(&gclk_chan_config);
gclk_chan_config.source_generator = config->clock_source;
system_gclk_chan_set_config(inst_gclk_id[instance], &gclk_chan_config);
system_gclk_chan_enable(inst_gclk_id[instance]);
/* Set ctrla register */
ctrla_tmp =
(uint32_t)config->counter_size |
(uint32_t)config->wave_generation |
(uint32_t)config->reload_action |
(uint32_t)config->clock_prescaler;
if (config->run_in_standby) {
ctrla_tmp |= TC_CTRLA_RUNSTDBY;
}
/* Write configuration to register */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CTRLA.reg = ctrla_tmp;
/* Set ctrlb register */
if (config->oneshot) {
ctrlbset_tmp = TC_CTRLBSET_ONESHOT;
}
if (config->count_direction) {
ctrlbset_tmp |= TC_CTRLBSET_DIR;
}
/* Clear old ctrlb configuration */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CTRLBCLR.reg = 0xFF;
/* Check if we actually need to go into a wait state. */
if (ctrlbset_tmp) {
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Write configuration to register */
hw->COUNT8.CTRLBSET.reg = ctrlbset_tmp;
}
/* Set ctrlc register*/
ctrlc_tmp = config->waveform_invert_output;
for (uint8_t i = 0; i < NUMBER_OF_COMPARE_CAPTURE_CHANNELS; i++) {
if (config->enable_capture_on_channel[i] == true) {
ctrlc_tmp |= (TC_CTRLC_CPTEN(1) << i);
}
}
/* Write configuration to register */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CTRLC.reg = ctrlc_tmp;
/* Write configuration to register */
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Switch for TC counter size */
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.COUNT.reg =
config->counter_8_bit.value;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.PER.reg =
config->counter_8_bit.period;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CC[0].reg =
config->counter_8_bit.compare_capture_channel[0];
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT8.CC[1].reg =
config->counter_8_bit.compare_capture_channel[1];
return STATUS_OK;
case TC_COUNTER_SIZE_16BIT:
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT16.COUNT.reg
= config->counter_16_bit.value;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT16.CC[0].reg =
config->counter_16_bit.compare_capture_channel[0];
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT16.CC[1].reg =
config->counter_16_bit.compare_capture_channel[1];
return STATUS_OK;
case TC_COUNTER_SIZE_32BIT:
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT32.COUNT.reg
= config->counter_32_bit.value;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT32.CC[0].reg =
config->counter_32_bit.compare_capture_channel[0];
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
hw->COUNT32.CC[1].reg =
config->counter_32_bit.compare_capture_channel[1];
return STATUS_OK;
}
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
/**
* \brief Sets TC module count value.
*
* Sets the current timer count value of a initialized TC module. The
* specified TC module may be started or stopped.
*
* \param[in] module_inst Pointer to the software module instance struct
* \param[in] count New timer count value to set
*
* \return Status of the count update procedure.
*
* \retval STATUS_OK The timer count was updated successfully
* \retval STATUS_ERR_INVALID_ARG An invalid timer counter size was specified
*/
enum status_code tc_set_count_value(
const struct tc_module *const module_inst,
const uint32_t count)
{
/* Sanity check arguments */
Assert(module_inst);
Assert(module_inst->hw);
/* Get a pointer to the module's hardware instance*/
Tc *const tc_module = module_inst->hw;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Write to based on the TC counter_size */
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
tc_module->COUNT8.COUNT.reg = (uint8_t)count;
return STATUS_OK;
case TC_COUNTER_SIZE_16BIT:
tc_module->COUNT16.COUNT.reg = (uint16_t)count;
return STATUS_OK;
case TC_COUNTER_SIZE_32BIT:
tc_module->COUNT32.COUNT.reg = (uint32_t)count;
return STATUS_OK;
default:
return STATUS_ERR_INVALID_ARG;
}
}
/**
* \brief Get TC module count value.
*
* Retrieves the current count value of a TC module. The specified TC module
* may be started or stopped.
*
* \param[in] module_inst Pointer to the software module instance struct
*
* \return Count value of the specified TC module.
*/
uint32_t tc_get_count_value(
const struct tc_module *const module_inst)
{
/* Sanity check arguments */
Assert(module_inst);
Assert(module_inst->hw);
/* Get a pointer to the module's hardware instance */
Tc *const tc_module = module_inst->hw;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Read from based on the TC counter size */
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
return (uint32_t)tc_module->COUNT8.COUNT.reg;
case TC_COUNTER_SIZE_16BIT:
return (uint32_t)tc_module->COUNT16.COUNT.reg;
case TC_COUNTER_SIZE_32BIT:
return tc_module->COUNT32.COUNT.reg;
}
Assert(false);
return 0;
}
/**
* \brief Gets the TC module capture value.
*
* Retrieves the capture value in the indicated TC module capture channel.
*
* \param[in] module_inst Pointer to the software module instance struct
* \param[in] channel_index Index of the Compare Capture channel to read
*
* \return Capture value stored in the specified timer channel.
*/
uint32_t tc_get_capture_value(
const struct tc_module *const module_inst,
const enum tc_compare_capture_channel channel_index)
{
/* Sanity check arguments */
Assert(module_inst);
Assert(module_inst->hw);
/* Get a pointer to the module's hardware instance */
Tc *const tc_module = module_inst->hw;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Read out based on the TC counter size */
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
return tc_module->COUNT8.CC[channel_index].reg;
}
case TC_COUNTER_SIZE_16BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
return tc_module->COUNT16.CC[channel_index].reg;
}
case TC_COUNTER_SIZE_32BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
return tc_module->COUNT32.CC[channel_index].reg;
}
}
Assert(false);
return 0;
}
/**
* \brief Sets a TC module compare value.
*
* Writes a compare value to the given TC module compare/capture channel.
*
* \param[in] module_inst Pointer to the software module instance struct
* \param[in] channel_index Index of the compare channel to write to
* \param[in] compare New compare value to set
*
* \return Status of the compare update procedure.
*
* \retval STATUS_OK The compare value was updated successfully
* \retval STATUS_ERR_INVALID_ARG An invalid channel index was supplied
*/
enum status_code tc_set_compare_value(
const struct tc_module *const module_inst,
const enum tc_compare_capture_channel channel_index,
const uint32_t compare)
{
/* Sanity check arguments */
Assert(module_inst);
Assert(module_inst->hw);
/* Get a pointer to the module's hardware instance */
Tc *const tc_module = module_inst->hw;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
/* Read out based on the TC counter size */
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
tc_module->COUNT8.CC[channel_index].reg =
(uint8_t)compare;
return STATUS_OK;
}
case TC_COUNTER_SIZE_16BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
tc_module->COUNT16.CC[channel_index].reg =
(uint16_t)compare;
return STATUS_OK;
}
case TC_COUNTER_SIZE_32BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
tc_module->COUNT32.CC[channel_index].reg =
(uint32_t)compare;
return STATUS_OK;
}
}
return STATUS_ERR_INVALID_ARG;
}
/**
* \brief Resets the TC module.
*
* Resets the TC module, restoring all hardware module registers to their
* default values and disabling the module. The TC module will not be
* accessible while the reset is being performed.
*
* \note When resetting a 32-bit counter only the master TC module's instance
* structure should be passed to the function.
*
* \param[in] module_inst Pointer to the software module instance struct
*
* \return Status of the procedure.
* \retval STATUS_OK The module was reset successfully
* \retval STATUS_ERR_UNSUPPORTED_DEV A 32-bit slave TC module was passed to
* the function. Only use reset on master
* TC
*/
enum status_code tc_reset(
const struct tc_module *const module_inst)
{
/* Sanity check arguments */
Assert(module_inst);
Assert(module_inst->hw);
/* Get a pointer to the module hardware instance */
TcCount8 *const tc_module = &(module_inst->hw->COUNT8);
if (tc_module->STATUS.reg & TC_STATUS_SLAVE) {
return STATUS_ERR_UNSUPPORTED_DEV;
}
/* Disable this module if it is running */
if (tc_module->CTRLA.reg & TC_CTRLA_ENABLE) {
tc_disable(module_inst);
while (tc_is_syncing(module_inst)) {
/* wait while module is disabling */
}
}
/* Reset this TC module */
tc_module->CTRLA.reg |= TC_CTRLA_SWRST;
return STATUS_OK;
}
/**
* \brief Set the timer TOP/period value.
*
* For 8-bit counter size this function writes the top value to the period
* register.
*
* For 16- and 32-bit counter size this function writes the top value to
* Capture Compare register 0. The value in this register can not be used for
* any other purpose.
*
* \note This function is designed to be used in PWM or frequency
* match modes only, when the counter is set to 16- or 32-bit counter
* size. In 8-bit counter size it will always be possible to change the
* top value even in normal mode.
*
* \param[in] module_inst Pointer to the software module instance struct
* \param[in] top_value New timer TOP value to set
*
* \return Status of the TOP set procedure.
*
* \retval STATUS_OK The timer TOP value was updated successfully
* \retval STATUS_ERR_INVALID_ARG The configured TC module counter size in the
* module instance is invalid
*/
enum status_code tc_set_top_value (
const struct tc_module *const module_inst,
const uint32_t top_value)
{
Assert(module_inst);
Assert(module_inst->hw);
Assert(top_value);
Tc *const tc_module = module_inst->hw;
while (tc_is_syncing(module_inst)) {
/* Wait for sync */
}
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
tc_module->COUNT8.PER.reg = (uint8_t)top_value;
return STATUS_OK;
case TC_COUNTER_SIZE_16BIT:
tc_module->COUNT16.CC[0].reg = (uint16_t)top_value;
return STATUS_OK;
case TC_COUNTER_SIZE_32BIT:
tc_module->COUNT32.CC[0].reg = (uint32_t)top_value;
return STATUS_OK;
default:
Assert(false);
return STATUS_ERR_INVALID_ARG;
}
}

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/**
* \file
*
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver
*
* Copyright (C) 2013-2016 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#include "tcc_callback.h"
void *_tcc_instances[TCC_INST_NUM];
void _tcc_interrupt_handler(uint8_t module_index);
const uint32_t _tcc_intflag[TCC_CALLBACK_N] = {
TCC_INTFLAG_OVF,
TCC_INTFLAG_TRG,
TCC_INTFLAG_CNT,
TCC_INTFLAG_ERR,
TCC_INTFLAG_FAULTA,
TCC_INTFLAG_FAULTB,
TCC_INTFLAG_FAULT0,
TCC_INTFLAG_FAULT1,
#define _TCC_INTFLAG_MC(n,dummy) TCC_INTFLAG_MC##n,
/* TCC_INTFLAG_MC0 ~ ... */
MREPEAT(TCC_NUM_CHANNELS, _TCC_INTFLAG_MC, 0)
#undef _TCC_INTFLAG_MC
};
# define _TCC_INTERRUPT_VECT_NUM(n, unused) \
SYSTEM_INTERRUPT_MODULE_TCC##n,
/**
* \internal Get the interrupt vector for the given device instance
*
* \param[in] The TCC module instance number
*
* \return Interrupt vector for of the given TCC module instance.
*/
static enum system_interrupt_vector _tcc_interrupt_get_interrupt_vector(
uint32_t inst_num)
{
static uint8_t tcc_interrupt_vectors[TCC_INST_NUM] = {
MREPEAT(TCC_INST_NUM, _TCC_INTERRUPT_VECT_NUM, 0)
};
return (enum system_interrupt_vector)tcc_interrupt_vectors[inst_num];
}
/**
* \brief Registers a callback
*
* Registers a callback function which is implemented by the user.
*
* \note The callback must be enabled by \ref tcc_enable_callback,
* in order for the interrupt handler to call it when the conditions for the
* callback type is met.
*
* \param[in] module Pointer to TCC software instance struct
* \param[in] callback_func Pointer to callback function
* \param[in] callback_type Callback type given by an enum
*/
enum status_code tcc_register_callback(
struct tcc_module *const module,
tcc_callback_t callback_func,
const enum tcc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
Assert(callback_func);
/* Register callback function */
module->callback[callback_type] = callback_func;
/* Set the bit corresponding to the callback_type */
module->register_callback_mask |= _tcc_intflag[callback_type];
return STATUS_OK;
}
/**
* \brief Unregisters a callback
*
* Unregisters a callback function implemented by the user. The callback should
* be disabled before it is unregistered.
*
* \param[in] module Pointer to TCC software instance struct
* \param[in] callback_type Callback type given by an enum
*/
enum status_code tcc_unregister_callback(
struct tcc_module *const module,
const enum tcc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
/* Unregister callback function */
module->callback[callback_type] = NULL;
/* Clear the bit corresponding to the callback_type */
module->register_callback_mask &= ~_tcc_intflag[callback_type];
return STATUS_OK;
}
/**
* \brief Enables callback
*
* Enables the callback function registered by the \ref
* tcc_register_callback. The callback function will be called from the
* interrupt handler when the conditions for the callback type are
* met. This function will also enable the appropriate interrupts.
*
* \param[in] module Pointer to TCC software instance struct
* \param[in] callback_type Callback type given by an enum
*/
void tcc_enable_callback(
struct tcc_module *const module,
const enum tcc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
Assert(module->hw);
/* Enable interrupts for this TCC module */
system_interrupt_enable(_tcc_interrupt_get_interrupt_vector(
_tcc_get_inst_index(module->hw)));
/* Enable channel or other callbacks */
module->enable_callback_mask |= _tcc_intflag[callback_type];
module->hw->INTENSET.reg = _tcc_intflag[callback_type];
}
/**
* \brief Disables callback
*
* Disables the callback function registered by the \ref
* tcc_register_callback, and the callback will not be called from the
* interrupt routine. The function will also disable the appropriate
* interrupts.
*
* \param[in] module Pointer to TCC software instance struct
* \param[in] callback_type Callback type given by an enum
*/
void tcc_disable_callback(
struct tcc_module *const module,
const enum tcc_callback callback_type)
{
/* Sanity check arguments */
Assert(module);
Assert(module->hw);
/* Disable interrupts for this TCC module */
system_interrupt_disable(_tcc_interrupt_get_interrupt_vector(
_tcc_get_inst_index(module->hw)));
/* Disable channel or other callbacks */
module->enable_callback_mask &= ~_tcc_intflag[callback_type];
module->hw->INTENCLR.reg = _tcc_intflag[callback_type];
}
/**
* \internal ISR handler for TCC
*
* Auto-generate a set of interrupt handlers for each TCC in the device.
*/
#define _TCC_INTERRUPT_HANDLER(n, m) \
void TCC##n##_Handler(void) \
{ \
_tcc_interrupt_handler(n); \
}
MREPEAT(TCC_INST_NUM, _TCC_INTERRUPT_HANDLER, 0)
/**
* \internal Interrupt handler for the TCC module
*
* Handles interrupts as they occur, it will run the callback functions
* that are registered and enabled.
*
* \param[in] module_index ID of the TCC instance calling the interrupt
* handler
*/
void _tcc_interrupt_handler(
uint8_t module_index)
{
int i;
uint32_t interrupt_and_callback_status_mask;
struct tcc_module *module =
(struct tcc_module *)_tcc_instances[module_index];
interrupt_and_callback_status_mask = (module->hw->INTFLAG.reg &
module->register_callback_mask &
module->enable_callback_mask);
/* Check if callback interrupt has occured */
for (i = 0; i < TCC_CALLBACK_N; i ++) {
if (interrupt_and_callback_status_mask & _tcc_intflag[i]) {
/* Invoke the registered and enabled callback function */
(module->callback[i])(module);
/* Clear interrupt flag */
module->hw->INTFLAG.reg = _tcc_intflag[i];
}
}
}

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/**
* \file
*
* \brief SAM TCC - Timer Counter for Control Applications Callback Driver
*
* Copyright (C) 2013-2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#ifndef TCC_CALLBACK_H_INCLUDED
#define TCC_CALLBACK_H_INCLUDED
#include "tcc.h"
#include <system_interrupt.h>
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(__DOXYGEN__)
extern void *_tcc_instances[TCC_INST_NUM];
#endif
/**
* \name Callback Management
* {@
*/
enum status_code tcc_register_callback(
struct tcc_module *const module,
tcc_callback_t callback_func,
const enum tcc_callback callback_type);
enum status_code tcc_unregister_callback(
struct tcc_module *const module,
const enum tcc_callback callback_type);
void tcc_enable_callback(
struct tcc_module *const module,
const enum tcc_callback callback_type);
void tcc_disable_callback(
struct tcc_module *const module,
const enum tcc_callback callback_type);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* TCC_CALLBACK_H_INCLUDED */

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#include "pins.h"
#include "asf/sam0/drivers/system/system.h"
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0);
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN8);
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN9);
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4);
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5);
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10);
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19);
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18);
PIN(PA14, false, NO_ADC_INPUT);
PIN(PA09, true, ADC_POSITIVE_INPUT_PIN17);
PIN(PA08, true, ADC_POSITIVE_INPUT_PIN16);
PIN(PA15, false, NO_ADC_INPUT);
PIN(PA20, false, NO_ADC_INPUT);
PIN(PA06, true, ADC_POSITIVE_INPUT_PIN6);
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7);
PIN(PA18, false, NO_ADC_INPUT);
PIN(PA16, false, NO_ADC_INPUT);
PIN(PA19, false, NO_ADC_INPUT);
PIN(PA17, false, NO_ADC_INPUT);
PIN_NO_TIMERS_(PA02, true, ADC_POSITIVE_INPUT_PIN0);
PIN_ONE_TIMER_(PB08, true, ADC_POSITIVE_INPUT_PIN8,
TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0);
PIN_ONE_TIMER_(PB09, true, ADC_POSITIVE_INPUT_PIN9,
TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1);
PIN_ONE_TIMER_(PA04, true, ADC_POSITIVE_INPUT_PIN4,
0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0);
PIN_ONE_TIMER_(PA05, true, ADC_POSITIVE_INPUT_PIN5,
0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1);
PIN_NO_TIMERS_(PB02, true, ADC_POSITIVE_INPUT_PIN10);
PIN_TWO_TIMERS(PA11, true, ADC_POSITIVE_INPUT_PIN19,
0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1,
0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3);
PIN_TWO_TIMERS(PA10, true, ADC_POSITIVE_INPUT_PIN18,
0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0,
0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2);
PIN_TWO_TIMERS(PA14, false, NO_ADC_INPUT,
TC3, 0, 0, 0, PIN_PA14E_TC3_WO0, MUX_PA14E_TC3_WO0,
0, TCC0, 0, 4, PIN_PA14F_TCC0_WO4, MUX_PA14F_TCC0_WO4);
PIN_TWO_TIMERS(PA09, true, ADC_POSITIVE_INPUT_PIN17,
0, TCC0, 1, 1, PIN_PA09E_TCC0_WO1, MUX_PA09E_TCC0_WO1,
0, TCC1, 3, 3, PIN_PA09F_TCC1_WO3, MUX_PA09F_TCC1_WO3);
PIN_TWO_TIMERS(PA08, true, ADC_POSITIVE_INPUT_PIN16,
0, TCC0, 0, 0, PIN_PA08E_TCC0_WO0, MUX_PA08E_TCC0_WO0,
0, TCC1, 2, 2, PIN_PA08F_TCC1_WO2, MUX_PA08F_TCC1_WO2);
PIN_TWO_TIMERS(PA15, false, NO_ADC_INPUT,
TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1,
0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5);
PIN_ONE_TIMER_(PA20, false, NO_ADC_INPUT,
0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6);
PIN_ONE_TIMER_(PA21, false, NO_ADC_INPUT,
0, TCC0, 3, 7, PIN_PA21F_TCC0_WO7, MUX_PA21F_TCC0_WO7);
PIN_ONE_TIMER_(PA06, true, ADC_POSITIVE_INPUT_PIN6,
0, TCC1, 0, 0, PIN_PA06E_TCC1_WO0, MUX_PA06E_TCC1_WO0);
PIN_ONE_TIMER_(PA07, true, ADC_POSITIVE_INPUT_PIN7,
0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1);
PIN_TWO_TIMERS(PA18, false, NO_ADC_INPUT,
TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0,
0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2);
PIN_TWO_TIMERS(PA16, false, NO_ADC_INPUT,
0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0,
0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6);
PIN_TWO_TIMERS(PA19, false, NO_ADC_INPUT,
TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1,
0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3);
PIN_TWO_TIMERS(PA17, false, NO_ADC_INPUT,
0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1,
0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7);
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
@ -35,6 +64,7 @@ STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA08), (mp_obj_t)&pin_PA08 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA21), (mp_obj_t)&pin_PA21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA06), (mp_obj_t)&pin_PA06 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
@ -58,6 +88,7 @@ STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), (mp_obj_t)&pin_PA08 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), (mp_obj_t)&pin_PA15 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D6), (mp_obj_t)&pin_PA20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D7), (mp_obj_t)&pin_PA21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D8), (mp_obj_t)&pin_PA06 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), (mp_obj_t)&pin_PA07 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D10), (mp_obj_t)&pin_PA18 },

70
atmel-samd/boards/feather_m0_ble/pins.c
View File

@ -1,26 +1,56 @@
#include "pins.h"
#include "asf/sam0/drivers/system/system.h"
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0);
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN8);
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN9);
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4);
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5);
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10);
PIN(PB11, false, NO_ADC_INPUT);
PIN(PB10, false, NO_ADC_INPUT);
PIN(PA12, false, NO_ADC_INPUT);
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19);
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18);
PIN(PA22, false, NO_ADC_INPUT);
PIN(PA23, false, NO_ADC_INPUT);
PIN(PA15, false, NO_ADC_INPUT);
PIN(PA20, false, NO_ADC_INPUT);
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7);
PIN(PA18, false, NO_ADC_INPUT);
PIN(PA16, false, NO_ADC_INPUT);
PIN(PA19, false, NO_ADC_INPUT);
PIN(PA17, false, NO_ADC_INPUT);
PIN_NO_TIMERS_(PA02, true, ADC_POSITIVE_INPUT_PIN0);
PIN_ONE_TIMER_(PB08, true, ADC_POSITIVE_INPUT_PIN8,
TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0);
PIN_ONE_TIMER_(PB09, true, ADC_POSITIVE_INPUT_PIN9,
TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1);
PIN_ONE_TIMER_(PA04, true, ADC_POSITIVE_INPUT_PIN4,
0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0);
PIN_ONE_TIMER_(PA05, true, ADC_POSITIVE_INPUT_PIN5,
0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1);
PIN_NO_TIMERS_(PB02, true, ADC_POSITIVE_INPUT_PIN10);
PIN_TWO_TIMERS(PB11, false, NO_ADC_INPUT,
TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1,
0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5);
PIN_TWO_TIMERS(PB10, false, NO_ADC_INPUT,
TC5, 0, 0, 0, PIN_PB10E_TC5_WO0, MUX_PB10E_TC5_WO0,
0, TCC0, 0, 4, PIN_PB10F_TCC0_WO4, MUX_PB10F_TCC0_WO4);
PIN_TWO_TIMERS(PA12, false, NO_ADC_INPUT,
0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0,
0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6);
PIN_TWO_TIMERS(PA11, true, ADC_POSITIVE_INPUT_PIN19,
0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1,
0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3);
PIN_TWO_TIMERS(PA10, true, ADC_POSITIVE_INPUT_PIN18,
0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0,
0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2);
PIN_TWO_TIMERS(PA22, false, NO_ADC_INPUT,
TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0,
0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4);
PIN_TWO_TIMERS(PA23, false, NO_ADC_INPUT,
TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1,
0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5);
PIN_TWO_TIMERS(PA15, false, NO_ADC_INPUT,
TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1,
0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5);
PIN_ONE_TIMER_(PA20, false, NO_ADC_INPUT,
0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6);
PIN_ONE_TIMER_(PA07, true, ADC_POSITIVE_INPUT_PIN7,
0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1);
PIN_TWO_TIMERS(PA18, false, NO_ADC_INPUT,
TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0,
0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2);
PIN_TWO_TIMERS(PA16, false, NO_ADC_INPUT,
0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0,
0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6);
PIN_TWO_TIMERS(PA19, false, NO_ADC_INPUT,
TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1,
0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3);
PIN_TWO_TIMERS(PA17, false, NO_ADC_INPUT,
0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1,
0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7);
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },

2
atmel-samd/modmachine.c
View File

@ -34,6 +34,7 @@
#include "modmachine_adc.h"
#include "modmachine_dac.h"
#include "modmachine_pin.h"
#include "modmachine_pwm.h"
#if MICROPY_PY_MACHINE
@ -42,6 +43,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&adc_type) },
{ MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&dac_type) },
{ MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) },
{ MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&pwm_type) },
};
STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);

43
atmel-samd/modmachine_pin.h
View File

@ -35,27 +35,68 @@
#include "asf/sam0/drivers/adc/adc_sam_d_r/adc_feature.h"
// This macro is used to simplify pin definition in boards/<board>/pins.c
#define PIN(p_name, p_has_adc, p_adc_input) \
#define PIN_TWO_TIMERS(p_name, p_has_adc, p_adc_input, p_primary_tc, p_primary_tcc, \
p_primary_channel, p_primary_wave_output, p_primary_pin, p_primary_mux, \
p_secondary_tc, p_secondary_tcc, p_secondary_channel, p_secondary_wave_output, \
p_secondary_pin, p_secondary_mux) \
const pin_obj_t pin_## p_name = { \
{ &pin_type }, \
.name = MP_QSTR_ ## p_name, \
.pin = (PIN_## p_name), \
.has_adc = p_has_adc, \
.adc_input = p_adc_input, \
.primary_timer = { \
.tc = p_primary_tc, \
.tcc = p_primary_tcc, \
.channel = p_primary_channel, \
.wave_output = p_primary_wave_output, \
.pin = p_primary_pin, \
.mux = p_primary_mux \
}, \
.secondary_timer = { \
.tc = p_secondary_tc, \
.tcc = p_secondary_tcc, \
.channel = p_secondary_channel, \
.wave_output = p_secondary_wave_output, \
.pin = p_secondary_pin, \
.mux = p_secondary_mux \
} \
}
#define PIN_NO_TIMERS_(p_name, p_has_adc, p_adc_input) \
PIN_TWO_TIMERS(p_name, p_has_adc, p_adc_input, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)
#define PIN_ONE_TIMER_(p_name, p_has_adc, p_adc_input, p_primary_tcc, \
p_primary_tc, p_primary_channel, p_primary_wave_output, \
p_primary_pin, p_primary_mux) \
PIN_TWO_TIMERS(p_name, p_has_adc, p_adc_input, p_primary_tcc, p_primary_tc, \
p_primary_channel, p_primary_wave_output, p_primary_pin, p_primary_mux, \
0, 0, 0, 0, 0, 0)
#define NO_ADC_INPUT (0)
#include "mpconfigport.h"
#include "py/obj.h"
typedef struct {
Tc *const tc;
Tcc *const tcc;
uint8_t channel;
uint8_t wave_output;
uint32_t pin;
uint32_t mux;
} pin_timer_t;
typedef struct {
mp_obj_base_t base;
qstr name;
uint32_t pin;
bool has_adc;
enum adc_positive_input adc_input;
pin_timer_t primary_timer;
pin_timer_t secondary_timer;
} pin_obj_t;
extern const mp_obj_type_t pin_type;

192
atmel-samd/modmachine_pwm.c Normal file
View File

@ -0,0 +1,192 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2016 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdio.h>
#include <stdint.h>
#include "py/runtime.h"
#include "modmachine_pin.h"
#include "modmachine_pwm.h"
#include "asf/sam0/drivers/tc/tc.h"
#include "asf/sam0/drivers/tcc/tcc.h"
typedef struct _pwm_obj_t {
mp_obj_base_t base;
const pin_obj_t *pin;
bool using_primary_timer;
struct tc_module tc_instance;
struct tcc_module tcc_instance;
} pwm_obj_t;
/******************************************************************************/
// MicroPython bindings for PWM
STATIC void pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
mp_printf(print, "PWM(%s", self->pin->name);
mp_printf(print, ", freq=%u, duty=%u", 0, 0);
mp_printf(print, ")");
}
/// \classmethod \constructor(pin)
/// Create a PWM object associated with the given pin. This allows you to write PWM
/// signals out on the given pin. Frequency is currently fixed at ~735Hz like Arduino.
STATIC mp_obj_t pwm_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
mp_obj_t pin_obj = args[0];
const pin_obj_t *pin = pin_find(pin_obj);
// create PWM object from the given pin
pwm_obj_t *self = m_new_obj(pwm_obj_t);
self->base.type = &pwm_type;
self->pin = pin;
self->using_primary_timer = true;
mp_map_t kw_args;
mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
enum { ARG_duty };
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_duty, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
};
mp_arg_val_t parsed_args[MP_ARRAY_SIZE(allowed_args)];
mp_arg_parse_all(n_args - 1, args + 1, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, parsed_args);
if (pin->primary_timer.tc == 0 && pin->primary_timer.tcc == 0 &&
pin->secondary_timer.tc == 0 && pin->secondary_timer.tcc == 0) {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
"PWM not supported on pin %q", self->pin->name));
}
if (parsed_args[ARG_duty].u_int < 0 || parsed_args[ARG_duty].u_int > 255) {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
"PWM duty must be between 0 and 255 (8 bit resolution), not %d",
parsed_args[ARG_duty].u_int));
}
uint8_t duty = parsed_args[ARG_duty].u_int;
// TODO(tannewt): Support output on multiple timer channels at once.
const pin_timer_t* t = &pin->primary_timer;
if (t->tcc != 0) {
struct tcc_config config_tcc;
tcc_get_config_defaults(&config_tcc, t->tcc);
config_tcc.counter.clock_prescaler = TCC_CLOCK_PRESCALER_DIV256;
config_tcc.counter.period = 0xFF;
config_tcc.compare.wave_generation = TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
config_tcc.compare.match[t->channel] = duty;
config_tcc.pins.enable_wave_out_pin[t->wave_output] = true;
config_tcc.pins.wave_out_pin[t->wave_output] = t->pin;
config_tcc.pins.wave_out_pin_mux[t->wave_output] = t->mux;
tcc_init(&self->tcc_instance, t->tcc, &config_tcc);
tcc_enable(&self->tcc_instance);
} else {
struct tc_config config_tc;
tc_get_config_defaults(&config_tc);
config_tc.counter_size = TC_COUNTER_SIZE_8BIT;
config_tc.wave_generation = TC_WAVE_GENERATION_NORMAL_PWM;
config_tc.clock_prescaler = TC_CLOCK_PRESCALER_DIV256;
config_tc.counter_8_bit.period = 0xff;
config_tc.counter_8_bit.compare_capture_channel[t->channel] = duty;
config_tc.pwm_channel[t->wave_output].enabled = true;
config_tc.pwm_channel[t->wave_output].pin_out = t->pin;
config_tc.pwm_channel[t->wave_output].pin_mux = t->mux;
tc_init(&self->tc_instance, t->tc, &config_tc);
tc_enable(&self->tc_instance);
}
return MP_OBJ_FROM_PTR(self);
}
STATIC mp_obj_t pwm_del(mp_obj_t self_in) {
pwm_obj_t *self = MP_OBJ_TO_PTR(self_in);
const pin_timer_t* t = &self->pin->primary_timer;
if (!self->using_primary_timer) {
t = &self->pin->secondary_timer;
}
if (t->tcc != 0) {
tcc_disable(&self->tcc_instance);
} else {
tc_disable(&self->tc_instance);
}
return mp_const_none;
}
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pwm_del_obj, pwm_del);
// 8 bit resolution
STATIC mp_obj_t pwm_duty(size_t n_args, const mp_obj_t *args) {
pwm_obj_t *self = MP_OBJ_TO_PTR(args[0]);
const pin_timer_t* t = &self->pin->primary_timer;
if (!self->using_primary_timer) {
t = &self->pin->secondary_timer;
}
if (n_args == 1) {
uint8_t duty;
if (t->tcc != 0) {
duty = tcc_get_capture_value(&self->tcc_instance, t->channel);
} else {
duty = tc_get_capture_value(&self->tc_instance, t->channel);
}
return MP_OBJ_NEW_SMALL_INT(duty);
} else {
mp_int_t duty = mp_obj_get_int(args[1]);
if (duty < 0 || duty > 255) {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError,
"PWM duty must be between 0 and 255 (8 bit resolution), not %d",
duty));
}
if (t->tcc != 0) {
tcc_set_compare_value(&self->tcc_instance, t->channel, duty);
} else {
tc_set_compare_value(&self->tc_instance, t->channel, duty);
}
return mp_const_none;
}
}
STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pwm_duty_obj, 1, 2, pwm_duty);
STATIC const mp_rom_map_elem_t pwm_locals_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&pwm_del_obj) },
{ MP_ROM_QSTR(MP_QSTR_duty), MP_ROM_PTR(&pwm_duty_obj) },
};
STATIC MP_DEFINE_CONST_DICT(pwm_locals_dict, pwm_locals_dict_table);
const mp_obj_type_t pwm_type = {
{ &mp_type_type },
.name = MP_QSTR_PWM,
.print = pwm_print,
.make_new = pwm_make_new,
.locals_dict = (mp_obj_dict_t*)&pwm_locals_dict,
};

27
atmel-samd/modmachine_pwm.h Normal file
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@ -0,0 +1,27 @@
/*
* This file is part of the Micro Python project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2013, 2014 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
extern const mp_obj_type_t pwm_type;